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[PATCH v1 06/26] target/s390x: Introduce gen_psw_addr_disp
From: |
Richard Henderson |
Subject: |
[PATCH v1 06/26] target/s390x: Introduce gen_psw_addr_disp |
Date: |
Tue, 6 Sep 2022 11:17:27 +0100 |
In preparation for TARGET_TB_PCREL, reduce reliance on absolute values.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/s390x/tcg/translate.c | 69 ++++++++++++++++++++++++------------
1 file changed, 46 insertions(+), 23 deletions(-)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index b6e4005670..47a9d87416 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -169,6 +169,11 @@ static uint64_t inline_branch_hit[CC_OP_MAX];
static uint64_t inline_branch_miss[CC_OP_MAX];
#endif
+static void gen_psw_addr_disp(DisasContext *s, TCGv_i64 dest, int64_t disp)
+{
+ tcg_gen_movi_i64(dest, s->base.pc_next + disp);
+}
+
static void pc_to_link_info(TCGv_i64 out, DisasContext *s, uint64_t pc)
{
if (s->base.tb->flags & FLAG_MASK_32) {
@@ -334,18 +339,24 @@ static void return_low128(TCGv_i64 dest)
static void update_psw_addr(DisasContext *s)
{
- /* psw.addr */
- tcg_gen_movi_i64(psw_addr, s->base.pc_next);
+ gen_psw_addr_disp(s, psw_addr, 0);
}
static void per_branch(DisasContext *s, bool to_next)
{
#ifndef CONFIG_USER_ONLY
- tcg_gen_movi_i64(gbea, s->base.pc_next);
+ gen_psw_addr_disp(s, gbea, 0);
if (s->base.tb->flags & FLAG_MASK_PER) {
- TCGv_i64 next_pc = to_next ? tcg_constant_i64(s->pc_tmp) : psw_addr;
- gen_helper_per_branch(cpu_env, gbea, next_pc);
+ if (to_next) {
+ TCGv_i64 next_pc = tcg_temp_new_i64();
+
+ gen_psw_addr_disp(s, next_pc, s->ilen);
+ gen_helper_per_branch(cpu_env, gbea, next_pc);
+ tcg_temp_free_i64(next_pc);
+ } else {
+ gen_helper_per_branch(cpu_env, gbea, psw_addr);
+ }
}
#endif
}
@@ -358,20 +369,23 @@ static void per_branch_cond(DisasContext *s, TCGCond cond,
TCGLabel *lab = gen_new_label();
tcg_gen_brcond_i64(tcg_invert_cond(cond), arg1, arg2, lab);
- tcg_gen_movi_i64(gbea, s->base.pc_next);
+ gen_psw_addr_disp(s, gbea, 0);
gen_helper_per_branch(cpu_env, gbea, psw_addr);
gen_set_label(lab);
} else {
- TCGv_i64 pc = tcg_constant_i64(s->base.pc_next);
+ TCGv_i64 pc = tcg_temp_new_i64();
+
+ gen_psw_addr_disp(s, pc, 0);
tcg_gen_movcond_i64(cond, gbea, arg1, arg2, gbea, pc);
+ tcg_temp_free_i64(pc);
}
#endif
}
static void per_breaking_event(DisasContext *s)
{
- tcg_gen_movi_i64(gbea, s->base.pc_next);
+ gen_psw_addr_disp(s, gbea, 0);
}
static void update_cc_op(DisasContext *s)
@@ -1147,21 +1161,19 @@ struct DisasInsn {
static DisasJumpType help_goto_direct(DisasContext *s, int64_t disp)
{
- uint64_t dest = s->base.pc_next + disp;
-
- if (dest == s->pc_tmp) {
+ if (disp == s->ilen) {
per_branch(s, true);
return DISAS_NEXT;
}
- if (use_goto_tb(s, dest)) {
+ if (use_goto_tb(s, s->base.pc_next + disp)) {
update_cc_op(s);
per_breaking_event(s);
tcg_gen_goto_tb(0);
- tcg_gen_movi_i64(psw_addr, dest);
+ gen_psw_addr_disp(s, psw_addr, disp);
tcg_gen_exit_tb(s->base.tb, 0);
return DISAS_NORETURN;
} else {
- tcg_gen_movi_i64(psw_addr, dest);
+ gen_psw_addr_disp(s, psw_addr, disp);
per_branch(s, false);
return DISAS_PC_UPDATED;
}
@@ -1219,14 +1231,14 @@ static DisasJumpType help_branch(DisasContext *s,
DisasCompare *c,
/* Branch not taken. */
tcg_gen_goto_tb(0);
- tcg_gen_movi_i64(psw_addr, s->pc_tmp);
+ gen_psw_addr_disp(s, psw_addr, s->ilen);
tcg_gen_exit_tb(s->base.tb, 0);
/* Branch taken. */
gen_set_label(lab);
per_breaking_event(s);
tcg_gen_goto_tb(1);
- tcg_gen_movi_i64(psw_addr, dest);
+ gen_psw_addr_disp(s, psw_addr, disp);
tcg_gen_exit_tb(s->base.tb, 1);
ret = DISAS_NORETURN;
@@ -1249,12 +1261,12 @@ static DisasJumpType help_branch(DisasContext *s,
DisasCompare *c,
/* Branch not taken. */
update_cc_op(s);
tcg_gen_goto_tb(0);
- tcg_gen_movi_i64(psw_addr, s->pc_tmp);
+ gen_psw_addr_disp(s, psw_addr, s->ilen);
tcg_gen_exit_tb(s->base.tb, 0);
gen_set_label(lab);
if (is_imm) {
- tcg_gen_movi_i64(psw_addr, dest);
+ gen_psw_addr_disp(s, psw_addr, disp);
}
per_breaking_event(s);
ret = DISAS_PC_UPDATED;
@@ -1264,9 +1276,12 @@ static DisasJumpType help_branch(DisasContext *s,
DisasCompare *c,
Most commonly we're single-stepping or some other condition that
disables all use of goto_tb. Just update the PC and exit. */
- TCGv_i64 next = tcg_constant_i64(s->pc_tmp);
+ TCGv_i64 next = tcg_temp_new_i64();
+
+ gen_psw_addr_disp(s, next, s->ilen);
if (is_imm) {
- cdest = tcg_constant_i64(dest);
+ cdest = tcg_temp_new_i64();
+ gen_psw_addr_disp(s, cdest, disp);
}
if (c->is_64) {
@@ -1285,6 +1300,10 @@ static DisasJumpType help_branch(DisasContext *s,
DisasCompare *c,
tcg_temp_free_i64(t1);
}
+ tcg_temp_free_i64(next);
+ if (is_imm) {
+ tcg_temp_free_i64(cdest);
+ }
ret = DISAS_PC_UPDATED;
}
@@ -5827,7 +5846,8 @@ static void in2_a2(DisasContext *s, DisasOps *o)
static void in2_ri2(DisasContext *s, DisasOps *o)
{
- o->in2 = tcg_const_i64(s->base.pc_next + (int64_t)get_field(s, i2) * 2);
+ o->in2 = tcg_temp_new_i64();
+ gen_psw_addr_disp(s, o->in2, (int64_t)get_field(s, i2) * 2);
}
#define SPEC_in2_ri2 0
@@ -6306,8 +6326,11 @@ static DisasJumpType translate_one(CPUS390XState *env,
DisasContext *s)
#ifndef CONFIG_USER_ONLY
if (s->base.tb->flags & FLAG_MASK_PER) {
- TCGv_i64 addr = tcg_constant_i64(s->base.pc_next);
+ TCGv_i64 addr = tcg_temp_new_i64();
+
+ gen_psw_addr_disp(s, addr, 0);
gen_helper_per_ifetch(cpu_env, addr);
+ tcg_temp_free_i64(addr);
}
#endif
@@ -6428,7 +6451,7 @@ static DisasJumpType translate_one(CPUS390XState *env,
DisasContext *s)
if (s->base.tb->flags & FLAG_MASK_PER) {
/* An exception might be triggered, save PSW if not already done. */
if (ret == DISAS_NEXT || ret == DISAS_TOO_MANY) {
- tcg_gen_movi_i64(psw_addr, s->pc_tmp);
+ gen_psw_addr_disp(s, psw_addr, s->ilen);
}
/* Call the helper to check for a possible PER exception. */
--
2.34.1
- [PATCH v1 00/26] target/s390x: pc-relative translation, Richard Henderson, 2022/09/06
- [PATCH v1 02/26] target/s390x: Use tcg_constant_* for DisasCompare, Richard Henderson, 2022/09/06
- [PATCH v1 01/26] target/s390x: Use tcg_constant_* in local contexts, Richard Henderson, 2022/09/06
- [PATCH v1 03/26] target/s390x: Use tcg_constant_i32 for fpinst_extract_m34, Richard Henderson, 2022/09/06
- [PATCH v1 04/26] target/s390x: Use tcg_constant_* in translate_vx.c.inc, Richard Henderson, 2022/09/06
- [PATCH v1 05/26] target/s390x: Change help_goto_direct to work on displacements, Richard Henderson, 2022/09/06
- [PATCH v1 07/26] target/s390x: Remove pc argument to pc_to_link_into, Richard Henderson, 2022/09/06
- [PATCH v1 06/26] target/s390x: Introduce gen_psw_addr_disp,
Richard Henderson <=
- [PATCH v1 17/26] target/s390x: Introduce help_goto_indirect, Richard Henderson, 2022/09/06
- [PATCH v1 13/26] target/s390x: Add disp argument to update_psw_addr, Richard Henderson, 2022/09/06
- [PATCH v1 22/26] target/s390x: Pass original r2 register to BCR, Richard Henderson, 2022/09/06
- [PATCH v1 10/26] target/s390x: Use gen_psw_addr_disp in op_sam, Richard Henderson, 2022/09/06
- [PATCH v1 11/26] target/s390x: Use ilen instead in branches, Richard Henderson, 2022/09/06
- [PATCH v1 09/26] target/s390x: Use gen_psw_addr_disp in save_link_info, Richard Henderson, 2022/09/06
- [PATCH v1 18/26] target/s390x: Split per_branch, Richard Henderson, 2022/09/06
- [PATCH v1 08/26] target/s390x: Use gen_psw_addr_disp in pc_to_link_info, Richard Henderson, 2022/09/06
- [PATCH v1 12/26] target/s390x: Move masking of psw.addr to cpu_get_tb_cpu_state, Richard Henderson, 2022/09/06