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[PULL v3 19/20] target/riscv: Add MAX_INSN_LEN and insn_len
From: |
Richard Henderson |
Subject: |
[PULL v3 19/20] target/riscv: Add MAX_INSN_LEN and insn_len |
Date: |
Tue, 6 Sep 2022 09:38:14 +0100 |
These will be useful in properly ending the TB.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/translate.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 38666ddc91..a719aa6e63 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -1022,6 +1022,14 @@ static uint32_t opcode_at(DisasContextBase *dcbase,
target_ulong pc)
/* Include decoders for factored-out extensions */
#include "decode-XVentanaCondOps.c.inc"
+/* The specification allows for longer insns, but not supported by qemu. */
+#define MAX_INSN_LEN 4
+
+static inline int insn_len(uint16_t first_word)
+{
+ return (first_word & 3) == 3 ? 4 : 2;
+}
+
static void decode_opc(CPURISCVState *env, DisasContext *ctx, uint16_t opcode)
{
/*
@@ -1037,7 +1045,7 @@ static void decode_opc(CPURISCVState *env, DisasContext
*ctx, uint16_t opcode)
};
/* Check for compressed insn */
- if (extract16(opcode, 0, 2) != 3) {
+ if (insn_len(opcode) == 2) {
if (!has_ext(ctx, RVC)) {
gen_exception_illegal(ctx);
} else {
--
2.34.1
- [PULL v3 09/20] accel/tcg: Unlock mmap_lock after longjmp, (continued)
- [PULL v3 09/20] accel/tcg: Unlock mmap_lock after longjmp, Richard Henderson, 2022/09/06
- [PULL v3 07/20] accel/tcg: Introduce is_same_page(), Richard Henderson, 2022/09/06
- [PULL v3 11/20] accel/tcg: Move qemu_ram_addr_from_host_nofail to physmem.c, Richard Henderson, 2022/09/06
- [PULL v3 10/20] accel/tcg: Make tb_htable_lookup static, Richard Henderson, 2022/09/06
- [PULL v3 12/20] accel/tcg: Use probe_access_internal for softmmu get_page_addr_code_hostp, Richard Henderson, 2022/09/06
- [PULL v3 13/20] accel/tcg: Document the faulting lookup in tb_lookup_cmp, Richard Henderson, 2022/09/06
- [PULL v3 14/20] accel/tcg: Remove translator_ldsw, Richard Henderson, 2022/09/06
- [PULL v3 16/20] accel/tcg: Add fast path for translator_ld*, Richard Henderson, 2022/09/06
- [PULL v3 15/20] accel/tcg: Add pc and host_pc params to gen_intermediate_code, Richard Henderson, 2022/09/06
- [PULL v3 17/20] target/s390x: Make translator stop before the end of a page, Richard Henderson, 2022/09/06
- [PULL v3 19/20] target/riscv: Add MAX_INSN_LEN and insn_len,
Richard Henderson <=
- [PULL v3 20/20] target/riscv: Make translator stop before the end of a page, Richard Henderson, 2022/09/06
- [PULL v3 18/20] target/i386: Make translator stop before the end of a page, Richard Henderson, 2022/09/06
- Re: [PULL v3 00/20] tcg patch queue, Stefan Hajnoczi, 2022/09/06
- Re: [PULL v3 00/20] tcg patch queue, Thomas Huth, 2022/09/20