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[PULL 20/60] ppc/pnv: set root port chassis and slot using Bus propertie
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 20/60] ppc/pnv: set root port chassis and slot using Bus properties |
Date: |
Wed, 31 Aug 2022 15:49:54 -0300 |
For default root ports we have a way of accessing chassis and slot,
before root_port_realize(), via pnv_phb_attach_root_port(). For the
future user created root ports this won't be the case: we can't use
this helper because we don't have access to the PHB phb-id/chip-id
values.
In earlier patches we've added phb-id and chip-id to pnv-phb-root-bus
objects. We're now able to use the bus to retrieve them. The bus is
reachable for both user created and default devices, so we're changing
all the code paths. This also allow us to validate these changes with
the existing default devices.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220811163950.578927-4-danielhb413@gmail.com>
---
hw/pci-host/pnv_phb.c | 25 ++++++++++++++++---------
1 file changed, 16 insertions(+), 9 deletions(-)
diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c
index c47ed92462..826c0c144e 100644
--- a/hw/pci-host/pnv_phb.c
+++ b/hw/pci-host/pnv_phb.c
@@ -25,21 +25,19 @@
* QOM id. 'chip_id' is going to be used as PCIE chassis for the
* root port.
*/
-static void pnv_phb_attach_root_port(PCIHostState *pci, int index, int chip_id)
+static void pnv_phb_attach_root_port(PCIHostState *pci)
{
PCIDevice *root = pci_new(PCI_DEVFN(0, 0), TYPE_PNV_PHB_ROOT_PORT);
- g_autofree char *default_id = g_strdup_printf("%s[%d]",
- TYPE_PNV_PHB_ROOT_PORT,
- index);
const char *dev_id = DEVICE(root)->id;
+ g_autofree char *default_id = NULL;
+ int index;
+
+ index = object_property_get_int(OBJECT(pci->bus), "phb-id", &error_fatal);
+ default_id = g_strdup_printf("%s[%d]", TYPE_PNV_PHB_ROOT_PORT, index);
object_property_add_child(OBJECT(pci->bus), dev_id ? dev_id : default_id,
OBJECT(root));
- /* Set unique chassis/slot values for the root port */
- qdev_prop_set_uint8(DEVICE(root), "chassis", chip_id);
- qdev_prop_set_uint16(DEVICE(root), "slot", index);
-
pci_realize_and_unref(root, pci->bus, &error_fatal);
}
@@ -93,7 +91,7 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp)
pnv_phb4_bus_init(dev, PNV_PHB4(phb->backend));
}
- pnv_phb_attach_root_port(pci, phb->phb_id, phb->chip_id);
+ pnv_phb_attach_root_port(pci);
}
static const char *pnv_phb_root_bus_path(PCIHostState *host_bridge,
@@ -162,9 +160,18 @@ static void pnv_phb_root_port_realize(DeviceState *dev,
Error **errp)
{
PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev);
PnvPHBRootPort *phb_rp = PNV_PHB_ROOT_PORT(dev);
+ PCIBus *bus = PCI_BUS(qdev_get_parent_bus(dev));
PCIDevice *pci = PCI_DEVICE(dev);
uint16_t device_id = 0;
Error *local_err = NULL;
+ int chip_id, index;
+
+ chip_id = object_property_get_int(OBJECT(bus), "chip-id", &error_fatal);
+ index = object_property_get_int(OBJECT(bus), "phb-id", &error_fatal);
+
+ /* Set unique chassis/slot values for the root port */
+ qdev_prop_set_uint8(dev, "chassis", chip_id);
+ qdev_prop_set_uint16(dev, "slot", index);
rpc->parent_realize(dev, &local_err);
if (local_err) {
--
2.37.2
- [PULL 09/60] ppc/pnv: add PHB4 bus init helper, (continued)
- [PULL 09/60] ppc/pnv: add PHB4 bus init helper, Daniel Henrique Barboza, 2022/08/31
- [PULL 10/60] ppc/pnv: turn PnvPHB4 into a PnvPHB backend, Daniel Henrique Barboza, 2022/08/31
- [PULL 11/60] ppc/pnv: add pnv-phb-root-port device, Daniel Henrique Barboza, 2022/08/31
- [PULL 12/60] ppc/pnv: remove pnv-phb3-root-port, Daniel Henrique Barboza, 2022/08/31
- [PULL 13/60] ppc/pnv: remove pnv-phb4-root-port, Daniel Henrique Barboza, 2022/08/31
- [PULL 15/60] ppc/pnv: remove pecc->rp_model, Daniel Henrique Barboza, 2022/08/31
- [PULL 14/60] ppc/pnv: remove root port name from pnv_phb_attach_root_port(), Daniel Henrique Barboza, 2022/08/31
- [PULL 16/60] ppc/pnv: remove PnvPHB4.version, Daniel Henrique Barboza, 2022/08/31
- [PULL 17/60] ppc/pnv: move attach_root_port helper to pnv-phb.c, Daniel Henrique Barboza, 2022/08/31
- [PULL 18/60] ppc/pnv: add phb-id/chip-id PnvPHB3RootBus properties, Daniel Henrique Barboza, 2022/08/31
- [PULL 20/60] ppc/pnv: set root port chassis and slot using Bus properties,
Daniel Henrique Barboza <=
- [PULL 21/60] ppc/pnv: add helpers for pnv-phb user devices, Daniel Henrique Barboza, 2022/08/31
- [PULL 19/60] ppc/pnv: add phb-id/chip-id PnvPHB4RootBus properties, Daniel Henrique Barboza, 2022/08/31
- [PULL 22/60] ppc/pnv: turn chip8->phbs[] into a PnvPHB* array, Daniel Henrique Barboza, 2022/08/31
- [PULL 24/60] ppc/pnv: add PHB4 helpers for user created pnv-phb, Daniel Henrique Barboza, 2022/08/31
- [PULL 23/60] ppc/pnv: enable user created pnv-phb for powernv8, Daniel Henrique Barboza, 2022/08/31
- [PULL 25/60] ppc/pnv: enable user created pnv-phb for powernv9, Daniel Henrique Barboza, 2022/08/31
- [PULL 26/60] ppc/pnv: change pnv_phb4_get_pec() to also retrieve chip10->pecs, Daniel Henrique Barboza, 2022/08/31
- [PULL 27/60] ppc/pnv: user creatable pnv-phb for powernv10, Daniel Henrique Barboza, 2022/08/31
- [PULL 29/60] ppc/pnv: fix QOM parenting of user creatable root ports, Daniel Henrique Barboza, 2022/08/31
- [PULL 28/60] ppc/pnv: consolidate pnv_parent_*_fixup() helpers, Daniel Henrique Barboza, 2022/08/31