[PATCH 12/17] target/i386: add 68-6f, 78-7f opcodes

[Paolo Bonzini]

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/tcg/decode-new.c.inc | 16 ++++++
 target/i386/tcg/decode-old.c.inc |  2 +-
 target/i386/tcg/emit.c.inc       | 86 ++++++++++++++++++++++++++++++++
 3 files changed, 103 insertions(+), 1 deletion(-)

diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index 161a3b1554..6892000aaf 100644
--- a/target/i386/tcg/decode-new.c.inc
+++ b/target/i386/tcg/decode-new.c.inc
@@ -637,8 +637,24 @@ static X86OpEntry A2_08_FF[16][8] = {
         X86_OP_ENTRYw(POP, LoBits,d64),
     },
     {
+        X86_OP_ENTRYr(PUSH, I,z),
+        X86_OP_ENTRY3(IMUL, G,v, E,v, I,z, nowb),
+        X86_OP_ENTRYr(PUSH, I,b),
+        X86_OP_ENTRY3(IMUL, G,v, E,v, I,b, nowb),
+        X86_OP_ENTRY2(INS, Y,b, 2,w, nowb), /* DX */
+        X86_OP_ENTRY2(INS, Y,z, 2,w, nowb), /* DX */
+        X86_OP_ENTRY2(OUTS, 2,w, X,b, nowb), /* DX */
+        X86_OP_ENTRY2(OUTS, 2,w, X,b, nowb), /* DX */
     },
     {
+        X86_OP_ENTRYr(Jcc, J,b),
+        X86_OP_ENTRYr(Jcc, J,b),
+        X86_OP_ENTRYr(Jcc, J,b),
+        X86_OP_ENTRYr(Jcc, J,b),
+        X86_OP_ENTRYr(Jcc, J,b),
+        X86_OP_ENTRYr(Jcc, J,b),
+        X86_OP_ENTRYr(Jcc, J,b),
+        X86_OP_ENTRYr(Jcc, J,b),
     },
     {
     },
diff --git a/target/i386/tcg/decode-old.c.inc b/target/i386/tcg/decode-old.c.inc
index a297d126a4..7763bef11d 100644
--- a/target/i386/tcg/decode-old.c.inc
+++ b/target/i386/tcg/decode-old.c.inc
@@ -1821,7 +1821,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState 
*cpu)
 #else
         use_new &= b <= limit;
 #endif
-        if (use_new && b <= 0x5f) {
+        if (use_new && b <= 0x7f) {
             return disas_insn_new(s, cpu, b);
         }
     case 0x0f:
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index cf606e74c7..ae82ebd8c9 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -246,11 +246,74 @@ static void gen_DEC(DisasContext *s, CPUX86State *env, 
X86DecodedInsn *decode)
     gen_alu_op(s, OP_DECL, decode->op[0].ot);
 }
 
+static void gen_IMUL(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
+{
+    int reg = decode->op[0].n;
+    MemOp ot = decode->op[0].ot;
+
+    switch (ot) {
+#ifdef TARGET_X86_64
+    case MO_64:
+        tcg_gen_muls2_i64(cpu_regs[reg], s->T1, s->T0, s->T1);
+        tcg_gen_mov_tl(cpu_cc_dst, cpu_regs[reg]);
+        tcg_gen_sari_tl(cpu_cc_src, cpu_cc_dst, 63);
+        tcg_gen_sub_tl(cpu_cc_src, cpu_cc_src, s->T1);
+        break;
+#endif
+    case MO_32:
+        tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
+        tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1);
+        tcg_gen_muls2_i32(s->tmp2_i32, s->tmp3_i32,
+                          s->tmp2_i32, s->tmp3_i32);
+        tcg_gen_extu_i32_tl(cpu_regs[reg], s->tmp2_i32);
+        tcg_gen_sari_i32(s->tmp2_i32, s->tmp2_i32, 31);
+        tcg_gen_mov_tl(cpu_cc_dst, cpu_regs[reg]);
+        tcg_gen_sub_i32(s->tmp2_i32, s->tmp2_i32, s->tmp3_i32);
+        tcg_gen_extu_i32_tl(cpu_cc_src, s->tmp2_i32);
+        break;
+    default:
+        tcg_gen_ext16s_tl(s->T0, s->T0);
+        tcg_gen_ext16s_tl(s->T1, s->T1);
+        /* XXX: use 32 bit mul which could be faster */
+        tcg_gen_mul_tl(s->T0, s->T0, s->T1);
+        tcg_gen_mov_tl(cpu_cc_dst, s->T0);
+        tcg_gen_ext16s_tl(s->tmp0, s->T0);
+        tcg_gen_sub_tl(cpu_cc_src, s->T0, s->tmp0);
+        gen_op_mov_reg_v(s, ot, reg, s->T0);
+        break;
+    }
+    set_cc_op(s, CC_OP_MULB + ot);
+}
+
 static void gen_INC(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
 {
     gen_alu_op(s, OP_INCL, decode->op[0].ot);
 }
 
+static void gen_INS(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
+{
+    MemOp ot = decode->op[0].ot;
+
+    tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T1);
+    if (!gen_check_io(s, ot, s->tmp2_i32,
+                      SVM_IOIO_TYPE_MASK | SVM_IOIO_STR_MASK)) {
+        return;
+    }
+
+   if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
+       gen_io_start();
+   }
+   if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
+        gen_repz_ins(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base);
+        /* jump generated by gen_repz_ins */
+    } else {
+        gen_ins(s, ot);
+        if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
+            gen_jmp(s, s->pc - s->cs_base);
+        }
+    }
+}
+
 static void gen_Jcc(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
 {
     target_ulong next_eip = s->pc - s->cs_base;
@@ -273,6 +336,29 @@ static void gen_OR(DisasContext *s, CPUX86State *env, 
X86DecodedInsn *decode)
     gen_alu_op(s, OP_ORL, decode->op[0].ot);
 }
 
+static void gen_OUTS(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
+{
+    MemOp ot = decode->op[1].ot;
+
+    tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
+    if (!gen_check_io(s, ot, s->tmp2_i32, SVM_IOIO_STR_MASK)) {
+        return;
+    }
+
+   if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
+       gen_io_start();
+   }
+   if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
+        gen_repz_outs(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base);
+        /* jump generated by gen_repz_ins */
+    } else {
+        gen_outs(s, ot);
+        if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
+            gen_jmp(s, s->pc - s->cs_base);
+        }
+    }
+}
+
 static void gen_PUSH(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
 {
     gen_push_v(s, decode->op[2].v);
-- 
2.37.1