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[PATCH v2 21/66] target/arm: Split out get_phys_addr_with_secure
From: |
Richard Henderson |
Subject: |
[PATCH v2 21/66] target/arm: Split out get_phys_addr_with_secure |
Date: |
Mon, 22 Aug 2022 08:26:56 -0700 |
Retain the existing get_phys_addr interface using
the security state derived from mmu_idx.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/internals.h | 6 ++++++
target/arm/ptw.c | 21 +++++++++++++++------
2 files changed, 21 insertions(+), 6 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index ee40f41c12..3ccc79f3d9 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1145,6 +1145,12 @@ typedef struct GetPhysAddrResult {
ARMCacheAttrs cacheattrs;
} GetPhysAddrResult;
+bool get_phys_addr_with_secure(CPUARMState *env, target_ulong address,
+ MMUAccessType access_type,
+ ARMMMUIdx mmu_idx, bool is_secure,
+ GetPhysAddrResult *result, ARMMMUFaultInfo *fi)
+ __attribute__((nonnull));
+
bool get_phys_addr(CPUARMState *env, target_ulong address,
MMUAccessType access_type, ARMMMUIdx mmu_idx,
GetPhysAddrResult *result, ARMMMUFaultInfo *fi)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index c338e2324a..c132d0cada 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -2282,12 +2282,12 @@ static ARMCacheAttrs combine_cacheattrs(CPUARMState
*env,
* @result: set on translation success.
* @fi: set to fault info if the translation fails
*/
-bool get_phys_addr(CPUARMState *env, target_ulong address,
- MMUAccessType access_type, ARMMMUIdx mmu_idx,
- GetPhysAddrResult *result, ARMMMUFaultInfo *fi)
+bool get_phys_addr_with_secure(CPUARMState *env, target_ulong address,
+ MMUAccessType access_type, ARMMMUIdx mmu_idx,
+ bool is_secure, GetPhysAddrResult *result,
+ ARMMMUFaultInfo *fi)
{
ARMMMUIdx s1_mmu_idx = stage_1_mmu_idx(mmu_idx);
- bool is_secure = regime_is_secure(env, mmu_idx);
if (mmu_idx != s1_mmu_idx) {
/*
@@ -2303,8 +2303,8 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
ARMMMUIdx s2_mmu_idx;
bool is_el0;
- ret = get_phys_addr(env, address, access_type, s1_mmu_idx,
- result, fi);
+ ret = get_phys_addr_with_secure(env, address, access_type,
+ s1_mmu_idx, is_secure, result, fi);
/* If S1 fails or S2 is disabled, return early. */
if (ret || regime_translation_disabled(env, ARMMMUIdx_Stage2,
@@ -2514,6 +2514,15 @@ bool get_phys_addr(CPUARMState *env, target_ulong
address,
}
}
+bool get_phys_addr(CPUARMState *env, target_ulong address,
+ MMUAccessType access_type, ARMMMUIdx mmu_idx,
+ GetPhysAddrResult *result, ARMMMUFaultInfo *fi)
+{
+ return get_phys_addr_with_secure(env, address, access_type, mmu_idx,
+ regime_is_secure(env, mmu_idx),
+ result, fi);
+}
+
hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cs, vaddr addr,
MemTxAttrs *attrs)
{
--
2.34.1
- [PATCH v2 10/66] target/arm: Remove is_subpage argument to pmsav8_mpu_lookup, (continued)
- [PATCH v2 10/66] target/arm: Remove is_subpage argument to pmsav8_mpu_lookup, Richard Henderson, 2022/08/22
- [PATCH v2 13/66] target/arm: Add is_secure parameter to get_phys_addr_v5, Richard Henderson, 2022/08/22
- [PATCH v2 11/66] target/arm: Add is_secure parameter to v8m_security_lookup, Richard Henderson, 2022/08/22
- [PATCH v2 08/66] target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav8, Richard Henderson, 2022/08/22
- [PATCH v2 15/66] target/arm: Add secure parameter to get_phys_addr_pmsav8, Richard Henderson, 2022/08/22
- [PATCH v2 14/66] target/arm: Add is_secure parameter to get_phys_addr_v6, Richard Henderson, 2022/08/22
- [PATCH v2 18/66] target/arm: Add secure parameter to get_phys_addr_pmsav7, Richard Henderson, 2022/08/22
- [PATCH v2 16/66] target/arm: Add is_secure parameter to pmsav7_use_background_region, Richard Henderson, 2022/08/22
- [PATCH v2 19/66] target/arm: Add is_secure parameter to regime_translation_disabled, Richard Henderson, 2022/08/22
- [PATCH v2 20/66] target/arm: Add is_secure parameter to get_phys_addr_pmsav5, Richard Henderson, 2022/08/22
- [PATCH v2 21/66] target/arm: Split out get_phys_addr_with_secure,
Richard Henderson <=
- [PATCH v2 22/66] target/arm: Add is_secure parameter to v7m_read_half_insn, Richard Henderson, 2022/08/22
- [PATCH v2 17/66] target/arm: Add is_secure parameter to get_phys_addr_lpae, Richard Henderson, 2022/08/22
- [PATCH v2 23/66] target/arm: Add TBFLAG_M32.SECURE, Richard Henderson, 2022/08/22
- [PATCH v2 24/66] target/arm: Merge regime_is_secure into get_phys_addr, Richard Henderson, 2022/08/22
- [PATCH v2 27/66] target/arm: Reorg regime_translation_disabled, Richard Henderson, 2022/08/22
- [PATCH v2 28/66] target/arm: Drop secure check for HCR.TGE vs SCTLR_EL1.M, Richard Henderson, 2022/08/22
- [PATCH v2 26/66] target/arm: Fold secure and non-secure a-profile mmu indexes, Richard Henderson, 2022/08/22
- [PATCH v2 29/66] target/arm: Introduce arm_hcr_el2_eff_secstate, Richard Henderson, 2022/08/22
- [PATCH v2 30/66] target/arm: Hoist read of *is_secure in S1_ptw_translate, Richard Henderson, 2022/08/22
- [PATCH v2 25/66] target/arm: Add is_secure parameter to do_ats_write, Richard Henderson, 2022/08/22