Re: [PATCH for-7.1 3/4] target/loongarch: rename the TCG CPU "la464" to "qemu64-v1.00"

[maobibo]

QEMU64 cpu model can be added, however la464 cpu model should be kept here
still. Actually there is no formal micro-achitecture name for loongarch, I
prefer to la464 still :)

Also host cpu model can be added later, which has the same features with
host processor. What is meaning for QEMU64/KVM64 cpu model? Does it mean
that minimum required CPU features for current popular OSV?

regards
bibo,mao


在 2022/8/14 22:55, WANG Xuerui 写道:
> From: WANG Xuerui <git@xen0n.name>
> 
> The only LoongArch CPU implemented is modeled after the Loongson 3A5000,
> but it is not the real thing, and at least one feature [1] is missing
> that actually made the model incompatible with the real 3A5000. What's
> more, the model is currently named "la464", while none of the
> micro-architecture-specific things are currently present, further making
> things needlessly complex.
> 
> In general, high-fidelity models can and should be named after the real
> hardware model, while generic emulation-oriented models should be named
> after ISA levels. For now, the best reference for LoongArch ISA levels
> is the revision number of the LoongArch ISA Manual, of which v1.00 is
> still the latest. (v1.01 and v1.02 are minor revisions without
> substantive change.)
> 
> As defined by various specs, the vendor and model names are also
> reflected in respective CSRs, and are 8 bytes long. So, rename "la464"
> to "qemu64-v1.00", with "QEMU64" as vendor name and "v1.00" as model
> name.
> 
> As the QEMU 7.1 hasn't been officially released, no downstream is
> expected to depend on the old name, so this change should be safe for
> 7.1.
> 
> [1]: 
> https://lore.kernel.org/loongarch/20220726094049.7200-2-maobibo@loongson.cn/
> 
> Signed-off-by: WANG Xuerui <git@xen0n.name>
> ---
>  hw/loongarch/virt.c    | 14 ++------------
>  target/loongarch/cpu.c |  6 +++---
>  2 files changed, 5 insertions(+), 15 deletions(-)
> 
> diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
> index 5cc0b05538..35e2174a17 100644
> --- a/hw/loongarch/virt.c
> +++ b/hw/loongarch/virt.c
> @@ -626,7 +626,6 @@ static void 
> loongarch_direct_kernel_boot(LoongArchMachineState *lams)
>  static void loongarch_init(MachineState *machine)
>  {
>      LoongArchCPU *lacpu;
> -    const char *cpu_model = machine->cpu_type;
>      ram_addr_t offset = 0;
>      ram_addr_t ram_size = machine->ram_size;
>      uint64_t highram_size = 0;
> @@ -634,15 +633,6 @@ static void loongarch_init(MachineState *machine)
>      LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
>      int i;
>  
> -    if (!cpu_model) {
> -        cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
> -    }
> -
> -    if (!strstr(cpu_model, "la464")) {
> -        error_report("LoongArch/TCG needs cpu type la464");
> -        exit(1);
> -    }
> -
>      if (ram_size < 1 * GiB) {
>          error_report("ram_size must be greater than 1G.");
>          exit(1);
> @@ -749,10 +739,10 @@ static void loongarch_class_init(ObjectClass *oc, void 
> *data)
>  {
>      MachineClass *mc = MACHINE_CLASS(oc);
>  
> -    mc->desc = "Loongson-3A5000 LS7A1000 machine";
> +    mc->desc = "LoongArch64 v1.00-compatible LS7A1000 machine";
>      mc->init = loongarch_init;
>      mc->default_ram_size = 1 * GiB;
> -    mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464");
> +    mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("qemu64-v1.00");
>      mc->default_ram_id = "loongarch.ram";
>      mc->max_cpus = LOONGARCH_MAX_VCPUS;
>      mc->is_default = 1;
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index 4663539443..0a41509a0c 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -527,9 +527,9 @@ static uint64_t loongarch_qemu_read(void *opaque, hwaddr 
> addr, unsigned size)
>          return 1ULL << IOCSRF_MSI | 1ULL << IOCSRF_EXTIOI |
>                 1ULL << IOCSRF_CSRIPI;
>      case VENDOR_REG:
> -        return 0x6e6f73676e6f6f4cULL; /* "Loongson" */
> +        return 0x3436554d4551ULL; /* "QEMU64" */
>      case CPUNAME_REG:
> -        return 0x303030354133ULL;     /* "3A5000" */
> +        return 0x30302e3176ULL;   /* "v1.00" */
>      case MISC_FUNC_REG:
>          return 1ULL << IOCSRM_EXTIOI_EN;
>      }
> @@ -715,7 +715,7 @@ static const TypeInfo loongarch_cpu_type_infos[] = {
>          .class_size = sizeof(LoongArchCPUClass),
>          .class_init = loongarch_cpu_class_init,
>      },
> -    DEFINE_LOONGARCH_CPU_TYPE("la464", loongarch_la464_initfn),
> +    DEFINE_LOONGARCH_CPU_TYPE("qemu64-v1.00", loongarch_la464_initfn),
>  };
>  
>  DEFINE_TYPES(loongarch_cpu_type_infos)