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[PATCH v1 8/8] accel/tcg: remove trace_vcpu_dstate TB checking
From: |
Alex Bennée |
Subject: |
[PATCH v1 8/8] accel/tcg: remove trace_vcpu_dstate TB checking |
Date: |
Thu, 11 Aug 2022 16:14:13 +0100 |
We removed the ability to do vcpu tcg tracing between:
d9a6bad542 (docs: remove references to TCG tracing)
and
126d4123c5 (tracing: excise the tcg related from tracetool)
but missed a bunch of other code. Lets continue the clean-up by
removing the extra field from tb_hash saving us 4 bytes per-TB and the
additional cost of hashing/checking something that was always empty
anyway.
There remain some per-vcpu trace points which don't look as though
they are called anywhere and the command line/QMP machinery to
clean-up.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
accel/tcg/tb-hash.h | 6 +++---
include/exec/exec-all.h | 3 ---
accel/tcg/cpu-exec.c | 6 +-----
accel/tcg/translate-all.c | 13 ++-----------
4 files changed, 6 insertions(+), 22 deletions(-)
diff --git a/accel/tcg/tb-hash.h b/accel/tcg/tb-hash.h
index 0a273d9605..d58115ee70 100644
--- a/accel/tcg/tb-hash.h
+++ b/accel/tcg/tb-hash.h
@@ -60,10 +60,10 @@ static inline unsigned int
tb_jmp_cache_hash_func(target_ulong pc)
#endif /* CONFIG_SOFTMMU */
static inline
-uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc, uint32_t flags,
- uint32_t cf_mask, uint32_t trace_vcpu_dstate)
+uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc,
+ uint32_t flags, uint32_t cf_mask)
{
- return qemu_xxhash7(phys_pc, pc, flags, cf_mask, trace_vcpu_dstate);
+ return qemu_xxhash6(phys_pc, pc, flags, cf_mask);
}
#endif
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 311e5fb422..21469da064 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -479,9 +479,6 @@ struct TranslationBlock {
#define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */
#define CF_CLUSTER_SHIFT 24
- /* Per-vCPU dynamic tracing state used to generate this TB */
- uint32_t trace_vcpu_dstate;
-
/*
* Above fields used for comparing
*/
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index a565a3f8ec..86f0276b1d 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -188,7 +188,6 @@ static inline TranslationBlock *tb_lookup(CPUState *cpu,
target_ulong pc,
tb->pc == pc &&
tb->cs_base == cs_base &&
tb->flags == flags &&
- tb->trace_vcpu_dstate == *cpu->trace_dstate &&
tb_cflags(tb) == cflags)) {
return tb;
}
@@ -494,7 +493,6 @@ struct tb_desc {
tb_page_addr_t phys_page1;
uint32_t flags;
uint32_t cflags;
- uint32_t trace_vcpu_dstate;
};
static bool tb_lookup_cmp(const void *p, const void *d)
@@ -506,7 +504,6 @@ static bool tb_lookup_cmp(const void *p, const void *d)
tb->page_addr[0] == desc->phys_page1 &&
tb->cs_base == desc->cs_base &&
tb->flags == desc->flags &&
- tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
tb_cflags(tb) == desc->cflags) {
/* check next page if needed */
if (tb->page_addr[1] == -1) {
@@ -537,14 +534,13 @@ TranslationBlock *tb_htable_lookup(CPUState *cpu,
target_ulong pc,
desc.cs_base = cs_base;
desc.flags = flags;
desc.cflags = cflags;
- desc.trace_vcpu_dstate = *cpu->trace_dstate;
desc.pc = pc;
phys_pc = get_page_addr_code(desc.env, pc);
if (phys_pc == -1) {
return NULL;
}
desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
- h = tb_hash_func(phys_pc, pc, flags, cflags, *cpu->trace_dstate);
+ h = tb_hash_func(phys_pc, pc, flags, cflags);
return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
}
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index ef62a199c7..ce05cb4103 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -197,11 +197,6 @@ struct page_collection {
#define V_L2_BITS 10
#define V_L2_SIZE (1 << V_L2_BITS)
-/* Make sure all possible CPU event bits fit in tb->trace_vcpu_dstate */
-QEMU_BUILD_BUG_ON(CPU_TRACE_DSTATE_MAX_EVENTS >
- sizeof_field(TranslationBlock, trace_vcpu_dstate)
- * BITS_PER_BYTE);
-
/*
* L1 Mapping properties
*/
@@ -894,7 +889,6 @@ static bool tb_cmp(const void *ap, const void *bp)
a->cs_base == b->cs_base &&
a->flags == b->flags &&
(tb_cflags(a) & ~CF_INVALID) == (tb_cflags(b) & ~CF_INVALID) &&
- a->trace_vcpu_dstate == b->trace_vcpu_dstate &&
a->page_addr[0] == b->page_addr[0] &&
a->page_addr[1] == b->page_addr[1];
}
@@ -1186,8 +1180,7 @@ static void do_tb_phys_invalidate(TranslationBlock *tb,
bool rm_from_page_list)
/* remove the TB from the hash list */
phys_pc = tb->page_addr[0] + (tb->pc & ~TARGET_PAGE_MASK);
- h = tb_hash_func(phys_pc, tb->pc, tb->flags, orig_cflags,
- tb->trace_vcpu_dstate);
+ h = tb_hash_func(phys_pc, tb->pc, tb->flags, orig_cflags);
if (!qht_remove(&tb_ctx.htable, tb, h)) {
return;
}
@@ -1349,8 +1342,7 @@ tb_link_page(TranslationBlock *tb, tb_page_addr_t phys_pc,
}
/* add in the hash table */
- h = tb_hash_func(phys_pc, tb->pc, tb->flags, tb->cflags,
- tb->trace_vcpu_dstate);
+ h = tb_hash_func(phys_pc, tb->pc, tb->flags, tb->cflags);
qht_insert(&tb_ctx.htable, tb, h, &existing_tb);
/* remove TB from the page(s) if we couldn't insert it */
@@ -1426,7 +1418,6 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
tb->cs_base = cs_base;
tb->flags = flags;
tb->cflags = cflags;
- tb->trace_vcpu_dstate = *cpu->trace_dstate;
tcg_ctx->tb_cflags = cflags;
tb_overflow:
--
2.30.2
- [PATCH v1 7/8] tests/avocado: apply a band aid to aspeed-evb login, (continued)
- [PATCH v1 7/8] tests/avocado: apply a band aid to aspeed-evb login, Alex Bennée, 2022/08/11
- [PATCH v1 2/8] cpu: cache CPUClass in CPUState for hot code paths, Alex Bennée, 2022/08/11
- [PATCH v1 5/8] ssi: cache SSIPeripheralClass to avoid GET_CLASS(), Alex Bennée, 2022/08/11
- [PATCH v1 1/8] linux-user: un-parent OBJECT(cpu) when closing thread, Alex Bennée, 2022/08/11
- [PATCH v1 6/8] tests/avocado: add timeout to the aspeed tests, Alex Bennée, 2022/08/11
- [PATCH v1 8/8] accel/tcg: remove trace_vcpu_dstate TB checking,
Alex Bennée <=
- Re: [PATCH for 7.1 v1 0/8] memory leaks and speed tweaks, Peter Maydell, 2022/08/11