Hi,
This is a rebase on top of ppc-7.2 of the previous patches sent
here:
https://lists.gnu.org/archive/html/qemu-devel/2022-07/msg01542.html
Now that we have the pnv-phb rework in the tree.
As a recap, the changes introduced in this series compared to what we've
done in "[PATCH v2 00/16] powernv: introduce pnv-phb base/proxy
devices" [1], is:
- the Root Buses objects are now inheriting phb-id and chip-id. This
turned out to be a clean way of keeping the code QOM compliant, without
having to do things like dev->parent_bus->parent. All the attributes
that the root port needs are found in its bus parent;
- the logic exclusive to user created devices is all centered in a
single helper inside pnv-phb realize(). PHB3/PHB4 realize() are
oblivious to whether the device is user created or not. I believe this
approach is clearer than what I was doing before.
[1] https://lists.gnu.org/archive/html/qemu-devel/2022-05/msg06254.html
Daniel Henrique Barboza (10):
ppc/pnv: add phb-id/chip-id PnvPHB3RootBus properties
ppc/pnv: add phb-id/chip-id PnvPHB4RootBus properties
ppc/pnv: set root port chassis and slot using Bus properties
ppc/pnv: add helpers for pnv-phb user devices
ppc/pnv: turn chip8->phbs[] into a PnvPHB* array
ppc/pnv: enable user created pnv-phb for powernv8
ppc/pnv: add PHB4 helpers for user created pnv-phb
ppc/pnv: enable user created pnv-phb powernv9
ppc/pnv: change pnv_phb4_get_pec() to also retrieve chip10->pecs
ppc/pnv: user creatable pnv-phb for powernv10
hw/pci-host/pnv_phb.c | 166 ++++++++++++++++++++++++++++++---
hw/pci-host/pnv_phb3.c | 50 ++++++++++
hw/pci-host/pnv_phb4.c | 51 ++++++++++
hw/pci-host/pnv_phb4_pec.c | 6 +-
hw/ppc/pnv.c | 30 +++++-
include/hw/pci-host/pnv_phb3.h | 9 +-
include/hw/pci-host/pnv_phb4.h | 10 ++
include/hw/ppc/pnv.h | 6 +-
8 files changed, 308 insertions(+), 20 deletions(-)