Hello,
To write a qtest for an SoC using ARM GICv3 as interrupt controller the
qtest infrastructure is short on IRQs.
File tests/qtest/libqtest.c defines:
#define MAX_IRQ 256
Which is the number of elements in the array that is used to keep track of
the value of the irq gpio:
bool irq_level[MAX_IRQ];
The GICv3 can take up to 1020. The SoC we are trying to emulate uses more
than the current 256 limit we can observe at the GIC input. If we focus just
on the external interrupt range the GIC would need 1020 - 32 = 988 IRQs.
Will it be OK to make this change to the qtest infrastructure?