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[PATCH qemu v6 10/10] target/riscv: rvv: Add option 'rvv_ma_all_1s' to e
From: |
~eopxd |
Subject: |
[PATCH qemu v6 10/10] target/riscv: rvv: Add option 'rvv_ma_all_1s' to enable optional mask agnostic behavior |
Date: |
Mon, 20 Jun 2022 06:51:11 -0000 |
From: eopXD <eop.chen@sifive.com>
According to v-spec, mask agnostic behavior can be either kept as
undisturbed or set elements' bits to all 1s. To distinguish the
difference of mask policies, QEMU should be able to simulate the mask
agnostic behavior as "set mask elements' bits to all 1s".
There are multiple possibility for agnostic elements according to
v-spec. The main intent of this patch-set tries to add option that
can distinguish between mask policies. Setting agnostic elements to
all 1s allows QEMU to express this.
This commit adds option 'rvv_ma_all_1s' is added to enable the
behavior, it is default as disabled.
Signed-off-by: eop Chen <eop.chen@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
---
target/riscv/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 05e6521351..a67b1c3e84 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -955,6 +955,7 @@ static Property riscv_cpu_properties[] = {
DEFINE_PROP_BOOL("short-isa-string", RISCVCPU, cfg.short_isa_string,
false),
DEFINE_PROP_BOOL("rvv_ta_all_1s", RISCVCPU, cfg.rvv_ta_all_1s, false),
+ DEFINE_PROP_BOOL("rvv_ma_all_1s", RISCVCPU, cfg.rvv_ma_all_1s, false),
DEFINE_PROP_END_OF_LIST(),
};
--
2.34.2
- [PATCH qemu v6 00/10] Add mask agnostic behavior for rvv instructions, ~eopxd, 2022/06/20
- [PATCH qemu v6 03/10] target/riscv: rvv: Add mask agnostic for vx instructions, ~eopxd, 2022/06/20
- [PATCH qemu v6 04/10] target/riscv: rvv: Add mask agnostic for vector integer shift instructions, ~eopxd, 2022/06/20
- [PATCH qemu v6 01/10] target/riscv: rvv: Add mask agnostic for vv instructions, ~eopxd, 2022/06/20
- [PATCH qemu v6 02/10] target/riscv: rvv: Add mask agnostic for vector load / store instructions, ~eopxd, 2022/06/20
- [PATCH qemu v6 05/10] target/riscv: rvv: Add mask agnostic for vector integer comparison instructions, ~eopxd, 2022/06/20
- [PATCH qemu v6 06/10] target/riscv: rvv: Add mask agnostic for vector fix-point arithmetic instructions, ~eopxd, 2022/06/20
- [PATCH qemu v6 10/10] target/riscv: rvv: Add option 'rvv_ma_all_1s' to enable optional mask agnostic behavior,
~eopxd <=
- [PATCH qemu v6 08/10] target/riscv: rvv: Add mask agnostic for vector mask instructions, ~eopxd, 2022/06/20
- [PATCH qemu v6 09/10] target/riscv: rvv: Add mask agnostic for vector permutation instructions, ~eopxd, 2022/06/20
- [PATCH qemu v6 07/10] target/riscv: rvv: Add mask agnostic for vector floating-point instructions, ~eopxd, 2022/06/20