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[PULL 35/49] hw/isa/piix3: QOM'ify PCI device creation and wiring
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 35/49] hw/isa/piix3: QOM'ify PCI device creation and wiring |
Date: |
Sat, 11 Jun 2022 12:32:58 +0200 |
From: Bernhard Beschow <shentey@gmail.com>
PCI interrupt wiring was performed in create() functions which are
obsolete. Move these tasks into QOM functions to modernize the code.
In order to avoid duplicate checking for xen_enabled() the realize
methods are now split.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220603185045.143789-10-shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/isa/piix3.c | 67 +++++++++++++++++++++++++++++++++-----------------
1 file changed, 45 insertions(+), 22 deletions(-)
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index d50a07b58b..89064eb837 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "qemu/range.h"
+#include "qapi/error.h"
#include "hw/southbridge/piix.h"
#include "hw/irq.h"
#include "hw/isa/isa.h"
@@ -278,7 +279,7 @@ static const MemoryRegionOps rcr_ops = {
.endianness = DEVICE_LITTLE_ENDIAN
};
-static void piix3_realize(PCIDevice *dev, Error **errp)
+static void pci_piix3_realize(PCIDevice *dev, Error **errp)
{
PIIX3State *d = PIIX3_PCI_DEVICE(dev);
@@ -317,7 +318,6 @@ static void pci_piix3_class_init(ObjectClass *klass, void
*data)
dc->desc = "ISA bridge";
dc->vmsd = &vmstate_piix3;
dc->hotpluggable = false;
- k->realize = piix3_realize;
k->vendor_id = PCI_VENDOR_ID_INTEL;
/* 82371SB PIIX3 PCI-to-ISA bridge (Step A1) */
k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0;
@@ -343,11 +343,28 @@ static const TypeInfo piix3_pci_type_info = {
},
};
+static void piix3_realize(PCIDevice *dev, Error **errp)
+{
+ ERRP_GUARD();
+ PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev);
+ PCIBus *pci_bus = pci_get_bus(dev);
+
+ pci_piix3_realize(dev, errp);
+ if (*errp) {
+ return;
+ }
+
+ pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq,
+ piix3, PIIX_NUM_PIRQS);
+ pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq);
+};
+
static void piix3_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->config_write = piix3_write_config;
+ k->realize = piix3_realize;
}
static const TypeInfo piix3_info = {
@@ -356,11 +373,33 @@ static const TypeInfo piix3_info = {
.class_init = piix3_class_init,
};
+static void piix3_xen_realize(PCIDevice *dev, Error **errp)
+{
+ ERRP_GUARD();
+ PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev);
+ PCIBus *pci_bus = pci_get_bus(dev);
+
+ pci_piix3_realize(dev, errp);
+ if (*errp) {
+ return;
+ }
+
+ /*
+ * Xen supports additional interrupt routes from the PCI devices to
+ * the IOAPIC: the four pins of each PCI device on the bus are also
+ * connected to the IOAPIC directly.
+ * These additional routes can be discovered through ACPI.
+ */
+ pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq,
+ piix3, XEN_PIIX_NUM_PIRQS);
+};
+
static void piix3_xen_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->config_write = piix3_write_config_xen;
+ k->realize = piix3_xen_realize;
};
static const TypeInfo piix3_xen_info = {
@@ -382,27 +421,11 @@ PIIX3State *piix3_create(PCIBus *pci_bus, ISABus
**isa_bus)
{
PIIX3State *piix3;
PCIDevice *pci_dev;
+ const char *type = xen_enabled() ? TYPE_PIIX3_XEN_DEVICE
+ : TYPE_PIIX3_DEVICE;
- /*
- * Xen supports additional interrupt routes from the PCI devices to
- * the IOAPIC: the four pins of each PCI device on the bus are also
- * connected to the IOAPIC directly.
- * These additional routes can be discovered through ACPI.
- */
- if (xen_enabled()) {
- pci_dev = pci_create_simple_multifunction(pci_bus, -1, true,
- TYPE_PIIX3_XEN_DEVICE);
- piix3 = PIIX3_PCI_DEVICE(pci_dev);
- pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq,
- piix3, XEN_PIIX_NUM_PIRQS);
- } else {
- pci_dev = pci_create_simple_multifunction(pci_bus, -1, true,
- TYPE_PIIX3_DEVICE);
- piix3 = PIIX3_PCI_DEVICE(pci_dev);
- pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq,
- piix3, PIIX_NUM_PIRQS);
- pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq);
- }
+ pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type);
+ piix3 = PIIX3_PCI_DEVICE(pci_dev);
*isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));
return piix3;
--
2.36.1
- [PULL 27/49] hw/southbridge/piix: Aggregate all PIIX southbridge type names, (continued)
- [PULL 27/49] hw/southbridge/piix: Aggregate all PIIX southbridge type names, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 28/49] hw/isa/piix4: Use object_initialize_child() for embedded struct, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 29/49] hw/isa/piix4: Move pci_map_irq_fn' near pci_set_irq_fn, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 30/49] hw/isa/piix4: QOM'ify PCI device creation and wiring, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 31/49] hw/isa/piix4: Factor out ISABus retrieval from piix4_create(), Philippe Mathieu-Daudé, 2022/06/11
- [PULL 32/49] hw/isa/piix4: QOM'ify PIIX4 PM creation, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 34/49] hw/isa/piix3: Move pci_map_irq_fn near pci_set_irq_fn, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 36/49] hw/isa/piix3: Factor out ISABus retrieval from piix3_create(), Philippe Mathieu-Daudé, 2022/06/11
- [PULL 33/49] hw/isa/piix4: Inline and remove piix4_create(), Philippe Mathieu-Daudé, 2022/06/11
- [PULL 37/49] hw/isa/piix3: Inline and remove piix3_create(), Philippe Mathieu-Daudé, 2022/06/11
- [PULL 35/49] hw/isa/piix3: QOM'ify PCI device creation and wiring,
Philippe Mathieu-Daudé <=
- [PULL 38/49] hw/i386/microvm-dt: Force explicit failure if retrieving QOM property fails, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 39/49] hw/i386/microvm-dt: Determine mc146818rtc's IRQ number from QOM property, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 40/49] hw/rtc/mc146818rtc: QOM'ify io_base offset, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 44/49] hw/i386/pc: Unexport functions used only internally, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 41/49] hw: Reuse TYPE_I8042 define, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 42/49] hw/audio/cs4231a: Const'ify global tables, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 43/49] hw/i386/pc: Unexport PC_CPU_MODEL_IDS macro, Philippe Mathieu-Daudé, 2022/06/11
- [PULL 47/49] accel/tcg/cpu-exec: Unexport dump_drift_info(), Philippe Mathieu-Daudé, 2022/06/11
- [PULL 46/49] hw/net/fsl_etsec/etsec: Remove obsolete and unused etsec_create(), Philippe Mathieu-Daudé, 2022/06/11
- [PULL 48/49] accel/tcg: Inline dump_opcount_info() and remove it, Philippe Mathieu-Daudé, 2022/06/11