[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 25/28] target/arm: Adjust format test in scr_write
From: |
Peter Maydell |
Subject: |
[PULL 25/28] target/arm: Adjust format test in scr_write |
Date: |
Fri, 10 Jun 2022 17:07:35 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Because reset always initializes the AA64 version, SCR_EL3,
test the mode of EL3 instead of the type of the cpreg.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220609214657.1217913-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index b95aa534741..ff9f9fe6ee4 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -1738,12 +1738,14 @@ static void scr_write(CPUARMState *env, const
ARMCPRegInfo *ri, uint64_t value)
uint32_t valid_mask = 0x3fff;
ARMCPU *cpu = env_archcpu(env);
- if (ri->state == ARM_CP_STATE_AA64) {
- if (arm_feature(env, ARM_FEATURE_AARCH64) &&
- !cpu_isar_feature(aa64_aa32_el1, cpu)) {
- value |= SCR_FW | SCR_AW; /* these two bits are RES1. */
- }
- valid_mask &= ~SCR_NET;
+ /*
+ * Because SCR_EL3 is the "real" cpreg and SCR is the alias, reset always
+ * passes the reginfo for SCR_EL3, which has type ARM_CP_STATE_AA64.
+ * Instead, choose the format based on the mode of EL3.
+ */
+ if (arm_el_is_aa64(env, 3)) {
+ value |= SCR_FW | SCR_AW; /* RES1 */
+ valid_mask &= ~SCR_NET; /* RES0 */
if (cpu_isar_feature(aa64_ras, cpu)) {
valid_mask |= SCR_TERR;
--
2.25.1
- [PULL 12/28] target/arm: Introduce gen_exception_insn, (continued)
- [PULL 12/28] target/arm: Introduce gen_exception_insn, Peter Maydell, 2022/06/10
- [PULL 11/28] target/arm: Rename gen_exception_insn to gen_exception_insn_el, Peter Maydell, 2022/06/10
- [PULL 03/28] target/arm: Move exception_target_el out of line, Peter Maydell, 2022/06/10
- [PULL 06/28] target/arm: Use is_a64 in arm_generate_debug_exceptions, Peter Maydell, 2022/06/10
- [PULL 10/28] target/arm: Introduce gen_exception_insn_el_v, Peter Maydell, 2022/06/10
- [PULL 20/28] target/arm: Remove default_exception_el, Peter Maydell, 2022/06/10
- [PULL 18/28] target/arm: Introduce gen_exception_el_v, Peter Maydell, 2022/06/10
- [PULL 15/28] target/arm: Move gen_exception to translate.c, Peter Maydell, 2022/06/10
- [PULL 23/28] target/arm: Fix Secure PL1 tests in fp_exception_el, Peter Maydell, 2022/06/10
- [PULL 21/28] target/arm: Create raise_exception_debug, Peter Maydell, 2022/06/10
- [PULL 25/28] target/arm: Adjust format test in scr_write,
Peter Maydell <=
- [PULL 28/28] semihosting/config: Merge --semihosting-config option groups, Peter Maydell, 2022/06/10
- [PULL 13/28] target/arm: Create helper_exception_swstep, Peter Maydell, 2022/06/10
- [PULL 14/28] target/arm: Remove TBFLAG_ANY.DEBUG_TARGET_EL, Peter Maydell, 2022/06/10
- [PULL 16/28] target/arm: Rename gen_exception to gen_exception_el, Peter Maydell, 2022/06/10
- [PULL 19/28] target/arm: Introduce helper_exception_with_syndrome, Peter Maydell, 2022/06/10
- [PULL 07/28] target/arm: Move exception_bkpt_insn to debug_helper.c, Peter Maydell, 2022/06/10
- [PULL 17/28] target/arm: Introduce gen_exception, Peter Maydell, 2022/06/10
- [PULL 26/28] target/arm: SCR_EL3.RW is RAO/WI without AArch32 EL[12], Peter Maydell, 2022/06/10
- [PULL 22/28] target/arm: Move arm_debug_target_el to debug_helper.c, Peter Maydell, 2022/06/10
- [PULL 24/28] tests/qtest: Reduce npcm7xx_sdhci test image size, Peter Maydell, 2022/06/10