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[PULL 43/55] target/arm: Hoist arm_is_el2_enabled check in sve_exception
From: |
Peter Maydell |
Subject: |
[PULL 43/55] target/arm: Hoist arm_is_el2_enabled check in sve_exception_el |
Date: |
Thu, 9 Jun 2022 10:05:25 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
This check is buried within arm_hcr_el2_eff(), but since we
have to have the explicit check for CPTR_EL2.TZ, we might as
well just check it once at the beginning of the block.
Once this is done, we can test HCR_EL2.{E2H,TGE} directly,
rather than going through arm_hcr_el2_eff().
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220607203306.657998-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 13 +++++--------
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 40b60b1eea2..61e8026d0e3 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6183,15 +6183,12 @@ int sve_exception_el(CPUARMState *env, int el)
}
}
- /*
- * CPTR_EL2 changes format with HCR_EL2.E2H (regardless of TGE).
- */
- if (el <= 2) {
- uint64_t hcr_el2 = arm_hcr_el2_eff(env);
- if (hcr_el2 & HCR_E2H) {
+ if (el <= 2 && arm_is_el2_enabled(env)) {
+ /* CPTR_EL2 changes format with HCR_EL2.E2H (regardless of TGE). */
+ if (env->cp15.hcr_el2 & HCR_E2H) {
switch (FIELD_EX64(env->cp15.cptr_el[2], CPTR_EL2, ZEN)) {
case 1:
- if (el != 0 || !(hcr_el2 & HCR_TGE)) {
+ if (el != 0 || !(env->cp15.hcr_el2 & HCR_TGE)) {
break;
}
/* fall through */
@@ -6199,7 +6196,7 @@ int sve_exception_el(CPUARMState *env, int el)
case 2:
return 2;
}
- } else if (arm_is_el2_enabled(env)) {
+ } else {
if (FIELD_EX64(env->cp15.cptr_el[2], CPTR_EL2, TZ)) {
return 2;
}
--
2.25.1
- [PULL 27/55] target/arm: Move check_s2_mmu_setup to ptw.c, (continued)
- [PULL 27/55] target/arm: Move check_s2_mmu_setup to ptw.c, Peter Maydell, 2022/06/09
- [PULL 28/55] target/arm: Move aa32_va_parameters to ptw.c, Peter Maydell, 2022/06/09
- [PULL 36/55] target/arm: Rename TBFLAG_A64 ZCR_LEN to VL, Peter Maydell, 2022/06/09
- [PULL 01/55] target/arm: Declare support for FEAT_RASv1p1, Peter Maydell, 2022/06/09
- [PULL 10/55] target/arm: Move get_phys_addr_v5 to ptw.c, Peter Maydell, 2022/06/09
- [PULL 17/55] target/arm: Move pmsav7_use_background_region to ptw.c, Peter Maydell, 2022/06/09
- [PULL 30/55] target/arm: Move regime_is_user to ptw.c, Peter Maydell, 2022/06/09
- [PULL 35/55] target/arm: Pass CPUARMState to arm_ld[lq]_ptw, Peter Maydell, 2022/06/09
- [PULL 33/55] target/arm: Move arm_cpu_get_phys_page_attrs_debug to ptw.c, Peter Maydell, 2022/06/09
- [PULL 26/55] target/arm: Move get_S1prot, get_S2prot to ptw.c, Peter Maydell, 2022/06/09
- [PULL 43/55] target/arm: Hoist arm_is_el2_enabled check in sve_exception_el,
Peter Maydell <=
- [PULL 42/55] target/arm: Use el_is_in_host for sve_exception_el, Peter Maydell, 2022/06/09
- [PULL 44/55] target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset, Peter Maydell, 2022/06/09
- [PULL 46/55] target/arm: Use uint32_t instead of bitmap for sve vq's, Peter Maydell, 2022/06/09
- [PULL 49/55] target/arm: Export sve contiguous ldst support functions, Peter Maydell, 2022/06/09
- [PULL 51/55] target/arm: Use expand_pred_b in mve_helper.c, Peter Maydell, 2022/06/09
- [PULL 53/55] target/arm: Export bfdotadd from vec_helper.c, Peter Maydell, 2022/06/09
- [PULL 55/55] target/arm: Add ID_AA64SMFR0_EL1, Peter Maydell, 2022/06/09
- [PULL 54/55] target/arm: Add isar_feature_aa64_sme, Peter Maydell, 2022/06/09
- [PULL 39/55] target/arm: Remove fp checks from sve_exception_el, Peter Maydell, 2022/06/09
- [PULL 45/55] target/arm: Merge aarch64_sve_zcr_get_valid_len into caller, Peter Maydell, 2022/06/09