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[PULL 17/43] target/loongarch: Add target build suport
From: |
Richard Henderson |
Subject: |
[PULL 17/43] target/loongarch: Add target build suport |
Date: |
Mon, 6 Jun 2022 16:14:24 -0700 |
From: Song Gao <gaosong@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220606124333.2060567-18-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/loongarch/meson.build | 19 +++++++++++++++++++
target/meson.build | 1 +
2 files changed, 20 insertions(+)
create mode 100644 target/loongarch/meson.build
diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
new file mode 100644
index 0000000000..bcb076e55f
--- /dev/null
+++ b/target/loongarch/meson.build
@@ -0,0 +1,19 @@
+gen = decodetree.process('insns.decode')
+
+loongarch_ss = ss.source_set()
+loongarch_ss.add(files(
+ 'cpu.c',
+ 'disas.c',
+))
+loongarch_tcg_ss = ss.source_set()
+loongarch_tcg_ss.add(gen)
+loongarch_tcg_ss.add(files(
+ 'fpu_helper.c',
+ 'op_helper.c',
+ 'translate.c',
+))
+loongarch_tcg_ss.add(zlib)
+
+loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
+
+target_arch += {'loongarch': loongarch_ss}
diff --git a/target/meson.build b/target/meson.build
index 2f6940255e..a53a60486f 100644
--- a/target/meson.build
+++ b/target/meson.build
@@ -5,6 +5,7 @@ subdir('cris')
subdir('hexagon')
subdir('hppa')
subdir('i386')
+subdir('loongarch')
subdir('m68k')
subdir('microblaze')
subdir('mips')
--
2.34.1
- [PULL 23/43] target/loongarch: Add LoongArch interrupt and exception handle, (continued)
- [PULL 23/43] target/loongarch: Add LoongArch interrupt and exception handle, Richard Henderson, 2022/06/06
- [PULL 29/43] target/loongarch: Add timer related instructions support., Richard Henderson, 2022/06/06
- [PULL 38/43] hw/loongarch: Add LoongArch ls7a rtc device support, Richard Henderson, 2022/06/06
- [PULL 22/43] target/loongarch: Add MMU support for LoongArch CPU., Richard Henderson, 2022/06/06
- [PULL 32/43] hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC), Richard Henderson, 2022/06/06
- [PULL 20/43] target/loongarch: Add basic vmstate description of CPU., Richard Henderson, 2022/06/06
- [PULL 26/43] target/loongarch: Add LoongArch IOCSR instruction, Richard Henderson, 2022/06/06
- [PULL 35/43] hw/loongarch: Add irq hierarchy for the system, Richard Henderson, 2022/06/06
- [PULL 17/43] target/loongarch: Add target build suport,
Richard Henderson <=
- [PULL 39/43] hw/loongarch: Add LoongArch load elf function., Richard Henderson, 2022/06/06
- [PULL 19/43] target/loongarch: Add CSRs definition, Richard Henderson, 2022/06/06
- [PULL 24/43] target/loongarch: Add constant timer support, Richard Henderson, 2022/06/06
- [PULL 28/43] target/loongarch: Add other core instructions support, Richard Henderson, 2022/06/06
- [PULL 30/43] hw/loongarch: Add support loongson3 virt machine type., Richard Henderson, 2022/06/06
- [PULL 25/43] target/loongarch: Add LoongArch CSR instruction, Richard Henderson, 2022/06/06
- [PULL 31/43] hw/loongarch: Add LoongArch ipi interrupt support(IPI), Richard Henderson, 2022/06/06
- [PULL 33/43] hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI), Richard Henderson, 2022/06/06
- [PULL 34/43] hw/intc: Add LoongArch extioi interrupt controller(EIOINTC), Richard Henderson, 2022/06/06
- [PULL 27/43] target/loongarch: Add TLB instruction support, Richard Henderson, 2022/06/06