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[PULL 00/43] target/loongarch: Initial system support
From: |
Richard Henderson |
Subject: |
[PULL 00/43] target/loongarch: Initial system support |
Date: |
Mon, 6 Jun 2022 16:14:07 -0700 |
Thanks for the patience, guys.
r~
The following changes since commit 57c9363c452af64fe058aa946cc923eae7f7ad33:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
(2022-06-06 07:57:14 -0700)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-la-20220606
for you to fetch changes up to 34bb43b074906a7cd642ccf03e2b7bea63b53d95:
target/loongarch: 'make check-tcg' support (2022-06-06 18:14:13 +0000)
----------------------------------------------------------------
Initial LoongArch support.
----------------------------------------------------------------
Song Gao (18):
target/loongarch: Add README
target/loongarch: Add core definition
target/loongarch: Add main translation routines
target/loongarch: Add fixed point arithmetic instruction translation
target/loongarch: Add fixed point shift instruction translation
target/loongarch: Add fixed point bit instruction translation
target/loongarch: Add fixed point load/store instruction translation
target/loongarch: Add fixed point atomic instruction translation
target/loongarch: Add fixed point extra instruction translation
target/loongarch: Add floating point arithmetic instruction translation
target/loongarch: Add floating point comparison instruction translation
target/loongarch: Add floating point conversion instruction translation
target/loongarch: Add floating point move instruction translation
target/loongarch: Add floating point load/store instruction translation
target/loongarch: Add branch instruction translation
target/loongarch: Add disassembler
target/loongarch: Add target build suport
target/loongarch: 'make check-tcg' support
Xiaojuan Yang (25):
target/loongarch: Add system emulation introduction
target/loongarch: Add CSRs definition
target/loongarch: Add basic vmstate description of CPU.
target/loongarch: Implement qmp_query_cpu_definitions()
target/loongarch: Add MMU support for LoongArch CPU.
target/loongarch: Add LoongArch interrupt and exception handle
target/loongarch: Add constant timer support
target/loongarch: Add LoongArch CSR instruction
target/loongarch: Add LoongArch IOCSR instruction
target/loongarch: Add TLB instruction support
target/loongarch: Add other core instructions support
target/loongarch: Add timer related instructions support.
hw/loongarch: Add support loongson3 virt machine type.
hw/loongarch: Add LoongArch ipi interrupt support(IPI)
hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)
hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI)
hw/intc: Add LoongArch extioi interrupt controller(EIOINTC)
hw/loongarch: Add irq hierarchy for the system
Enable common virtio pci support for LoongArch
hw/loongarch: Add some devices support for 3A5000.
hw/loongarch: Add LoongArch ls7a rtc device support
hw/loongarch: Add LoongArch load elf function.
hw/loongarch: Add LoongArch virt power manager support.
target/loongarch: Add gdb support.
tests/tcg/loongarch64: Add hello/memory test in loongarch64 system
docs/system/loongarch/loongson3.rst | 41 +
configure | 1 +
configs/devices/loongarch64-softmmu/default.mak | 3 +
configs/targets/loongarch64-softmmu.mak | 4 +
meson.build | 1 +
qapi/machine-target.json | 6 +-
qapi/machine.json | 2 +-
include/disas/dis-asm.h | 2 +
include/exec/poison.h | 2 +
include/hw/intc/loongarch_extioi.h | 62 ++
include/hw/intc/loongarch_ipi.h | 52 ++
include/hw/intc/loongarch_pch_msi.h | 20 +
include/hw/intc/loongarch_pch_pic.h | 69 ++
include/hw/loongarch/virt.h | 33 +
include/hw/pci-host/ls7a.h | 44 ++
include/sysemu/arch_init.h | 1 +
target/loongarch/cpu-csr.h | 208 +++++
target/loongarch/cpu-param.h | 18 +
target/loongarch/cpu.h | 391 ++++++++++
target/loongarch/helper.h | 130 ++++
target/loongarch/internals.h | 56 ++
target/loongarch/translate.h | 45 ++
tests/tcg/loongarch64/system/regdef.h | 86 ++
target/loongarch/insns.decode | 486 ++++++++++++
hw/intc/loongarch_extioi.c | 312 ++++++++
hw/intc/loongarch_ipi.c | 242 ++++++
hw/intc/loongarch_pch_msi.c | 73 ++
hw/intc/loongarch_pch_pic.c | 431 +++++++++++
hw/loongarch/loongson3.c | 382 +++++++++
hw/rtc/ls7a_rtc.c | 528 +++++++++++++
softmmu/qdev-monitor.c | 3 +-
target/loongarch/constant_timer.c | 64 ++
target/loongarch/cpu.c | 704 +++++++++++++++++
target/loongarch/csr_helper.c | 87 +++
target/loongarch/disas.c | 757 ++++++++++++++++++
target/loongarch/fpu_helper.c | 862 +++++++++++++++++++++
target/loongarch/gdbstub.c | 81 ++
target/loongarch/iocsr_helper.c | 67 ++
target/loongarch/machine.c | 102 +++
target/loongarch/op_helper.c | 133 ++++
target/loongarch/tlb_helper.c | 763 ++++++++++++++++++
target/loongarch/translate.c | 281 +++++++
target/loongarch/insn_trans/trans_arith.c.inc | 304 ++++++++
target/loongarch/insn_trans/trans_atomic.c.inc | 113 +++
target/loongarch/insn_trans/trans_bit.c.inc | 212 +++++
target/loongarch/insn_trans/trans_branch.c.inc | 83 ++
target/loongarch/insn_trans/trans_extra.c.inc | 101 +++
target/loongarch/insn_trans/trans_farith.c.inc | 105 +++
target/loongarch/insn_trans/trans_fcmp.c.inc | 56 ++
target/loongarch/insn_trans/trans_fcnv.c.inc | 33 +
target/loongarch/insn_trans/trans_fmemory.c.inc | 153 ++++
target/loongarch/insn_trans/trans_fmov.c.inc | 157 ++++
target/loongarch/insn_trans/trans_memory.c.inc | 229 ++++++
target/loongarch/insn_trans/trans_privileged.c.inc | 466 +++++++++++
target/loongarch/insn_trans/trans_shift.c.inc | 106 +++
MAINTAINERS | 24 +
gdb-xml/loongarch-base64.xml | 44 ++
gdb-xml/loongarch-fpu64.xml | 57 ++
hw/Kconfig | 1 +
hw/intc/Kconfig | 15 +
hw/intc/meson.build | 4 +
hw/intc/trace-events | 22 +
hw/loongarch/Kconfig | 16 +
hw/loongarch/meson.build | 4 +
hw/meson.build | 1 +
hw/rtc/Kconfig | 3 +
hw/rtc/meson.build | 1 +
target/Kconfig | 1 +
target/loongarch/Kconfig | 2 +
target/loongarch/README | 64 ++
target/loongarch/meson.build | 30 +
target/meson.build | 1 +
tests/tcg/loongarch64/Makefile.softmmu-target | 33 +
tests/tcg/loongarch64/system/boot.S | 56 ++
tests/tcg/loongarch64/system/kernel.ld | 30 +
75 files changed, 10158 insertions(+), 4 deletions(-)
create mode 100644 docs/system/loongarch/loongson3.rst
create mode 100644 configs/devices/loongarch64-softmmu/default.mak
create mode 100644 configs/targets/loongarch64-softmmu.mak
create mode 100644 include/hw/intc/loongarch_extioi.h
create mode 100644 include/hw/intc/loongarch_ipi.h
create mode 100644 include/hw/intc/loongarch_pch_msi.h
create mode 100644 include/hw/intc/loongarch_pch_pic.h
create mode 100644 include/hw/loongarch/virt.h
create mode 100644 include/hw/pci-host/ls7a.h
create mode 100644 target/loongarch/cpu-csr.h
create mode 100644 target/loongarch/cpu-param.h
create mode 100644 target/loongarch/cpu.h
create mode 100644 target/loongarch/helper.h
create mode 100644 target/loongarch/internals.h
create mode 100644 target/loongarch/translate.h
create mode 100644 tests/tcg/loongarch64/system/regdef.h
create mode 100644 target/loongarch/insns.decode
create mode 100644 hw/intc/loongarch_extioi.c
create mode 100644 hw/intc/loongarch_ipi.c
create mode 100644 hw/intc/loongarch_pch_msi.c
create mode 100644 hw/intc/loongarch_pch_pic.c
create mode 100644 hw/loongarch/loongson3.c
create mode 100644 hw/rtc/ls7a_rtc.c
create mode 100644 target/loongarch/constant_timer.c
create mode 100644 target/loongarch/cpu.c
create mode 100644 target/loongarch/csr_helper.c
create mode 100644 target/loongarch/disas.c
create mode 100644 target/loongarch/fpu_helper.c
create mode 100644 target/loongarch/gdbstub.c
create mode 100644 target/loongarch/iocsr_helper.c
create mode 100644 target/loongarch/machine.c
create mode 100644 target/loongarch/op_helper.c
create mode 100644 target/loongarch/tlb_helper.c
create mode 100644 target/loongarch/translate.c
create mode 100644 target/loongarch/insn_trans/trans_arith.c.inc
create mode 100644 target/loongarch/insn_trans/trans_atomic.c.inc
create mode 100644 target/loongarch/insn_trans/trans_bit.c.inc
create mode 100644 target/loongarch/insn_trans/trans_branch.c.inc
create mode 100644 target/loongarch/insn_trans/trans_extra.c.inc
create mode 100644 target/loongarch/insn_trans/trans_farith.c.inc
create mode 100644 target/loongarch/insn_trans/trans_fcmp.c.inc
create mode 100644 target/loongarch/insn_trans/trans_fcnv.c.inc
create mode 100644 target/loongarch/insn_trans/trans_fmemory.c.inc
create mode 100644 target/loongarch/insn_trans/trans_fmov.c.inc
create mode 100644 target/loongarch/insn_trans/trans_memory.c.inc
create mode 100644 target/loongarch/insn_trans/trans_privileged.c.inc
create mode 100644 target/loongarch/insn_trans/trans_shift.c.inc
create mode 100644 gdb-xml/loongarch-base64.xml
create mode 100644 gdb-xml/loongarch-fpu64.xml
create mode 100644 hw/loongarch/Kconfig
create mode 100644 hw/loongarch/meson.build
create mode 100644 target/loongarch/Kconfig
create mode 100644 target/loongarch/README
create mode 100644 target/loongarch/meson.build
create mode 100644 tests/tcg/loongarch64/Makefile.softmmu-target
create mode 100644 tests/tcg/loongarch64/system/boot.S
create mode 100644 tests/tcg/loongarch64/system/kernel.ld
- [PULL 00/43] target/loongarch: Initial system support,
Richard Henderson <=
- [PULL 01/43] target/loongarch: Add README, Richard Henderson, 2022/06/06
- [PULL 02/43] target/loongarch: Add core definition, Richard Henderson, 2022/06/06
- [PULL 03/43] target/loongarch: Add main translation routines, Richard Henderson, 2022/06/06
- [PULL 05/43] target/loongarch: Add fixed point shift instruction translation, Richard Henderson, 2022/06/06
- [PULL 04/43] target/loongarch: Add fixed point arithmetic instruction translation, Richard Henderson, 2022/06/06
- [PULL 07/43] target/loongarch: Add fixed point load/store instruction translation, Richard Henderson, 2022/06/06
- [PULL 06/43] target/loongarch: Add fixed point bit instruction translation, Richard Henderson, 2022/06/06
- [PULL 11/43] target/loongarch: Add floating point comparison instruction translation, Richard Henderson, 2022/06/06
- [PULL 08/43] target/loongarch: Add fixed point atomic instruction translation, Richard Henderson, 2022/06/06
- [PULL 09/43] target/loongarch: Add fixed point extra instruction translation, Richard Henderson, 2022/06/06