[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 08/19] target/m68k: Fix address argument for EXCP_CHK
From: |
Laurent Vivier |
Subject: |
[PULL 08/19] target/m68k: Fix address argument for EXCP_CHK |
Date: |
Thu, 2 Jun 2022 13:58:26 +0200 |
From: Richard Henderson <richard.henderson@linaro.org>
According to the M68040 Users Manual, section 8.4.3,
Six word stack frame (format 2), CHK, CHK2 (and others)
are supposed to record the next insn in PC and the
address of the trapping instruction in ADDRESS.
Create a raise_exception_format2 function to centralize recording
of the trapping pc in mmu.ar, plus advancing to the next insn.
Update m68k_interrupt_all to pass mmu.ar to do_stack_frame.
Update cpu_loop to pass mmu.ar to siginfo.si_addr, as the
kernel does in trap_c().
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220602013401.303699-7-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/cpu.h | 6 +++++
linux-user/m68k/cpu_loop.c | 2 +-
target/m68k/op_helper.c | 54 ++++++++++++++++++++------------------
3 files changed, 36 insertions(+), 26 deletions(-)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 9b3bf7a44819..558c3c67d607 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -122,6 +122,12 @@ typedef struct CPUArchState {
/* MMU status. */
struct {
+ /*
+ * Holds the "address" value in between raising an exception
+ * and creation of the exception stack frame.
+ * Used for both Format 7 exceptions (Access, i.e. mmu)
+ * and Format 2 exceptions (chk, div0, trapcc, etc).
+ */
uint32_t ar;
uint32_t ssw;
/* 68040 */
diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c
index 12e5d9cd5363..e24d17e180e3 100644
--- a/linux-user/m68k/cpu_loop.c
+++ b/linux-user/m68k/cpu_loop.c
@@ -47,7 +47,7 @@ void cpu_loop(CPUM68KState *env)
force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPN, env->pc);
break;
case EXCP_CHK:
- force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->pc);
+ force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->mmu.ar);
break;
case EXCP_DIV0:
force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->pc);
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index 777869790b66..750d65576fcf 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -397,13 +397,16 @@ static void m68k_interrupt_all(CPUM68KState *env, int
is_hw)
case EXCP_ILLEGAL:
case EXCP_DIV0:
- case EXCP_CHK:
case EXCP_TRAPCC:
case EXCP_TRACE:
/* FIXME: addr is not only env->pc */
do_stack_frame(env, &sp, 2, oldsr, env->pc, env->pc);
break;
+ case EXCP_CHK:
+ do_stack_frame(env, &sp, 2, oldsr, env->mmu.ar, env->pc);
+ break;
+
case EXCP_SPURIOUS ... EXCP_INT_LEVEL_7:
if (is_hw && (oldsr & SR_M)) {
do_stack_frame(env, &sp, 0, oldsr, 0, env->pc);
@@ -548,6 +551,29 @@ void HELPER(raise_exception)(CPUM68KState *env, uint32_t
tt)
raise_exception(env, tt);
}
+G_NORETURN static void
+raise_exception_format2(CPUM68KState *env, int tt, int ilen, uintptr_t raddr)
+{
+ CPUState *cs = env_cpu(env);
+
+ cs->exception_index = tt;
+
+ /* Recover PC and CC_OP for the beginning of the insn. */
+ cpu_restore_state(cs, raddr, true);
+
+ /* Flags are current in env->cc_*, or are undefined. */
+ env->cc_op = CC_OP_FLAGS;
+
+ /*
+ * Remember original pc in mmu.ar, for the Format 2 stack frame.
+ * Adjust PC to end of the insn.
+ */
+ env->mmu.ar = env->pc;
+ env->pc += ilen;
+
+ cpu_loop_exit(cs);
+}
+
void HELPER(divuw)(CPUM68KState *env, int destr, uint32_t den)
{
uint32_t num = env->dregs[destr];
@@ -1065,18 +1091,7 @@ void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t
ub)
env->cc_c = 0 <= ub ? val < 0 || val > ub : val > ub && val < 0;
if (val < 0 || val > ub) {
- CPUState *cs = env_cpu(env);
-
- /* Recover PC and CC_OP for the beginning of the insn. */
- cpu_restore_state(cs, GETPC(), true);
-
- /* flags have been modified by gen_flush_flags() */
- env->cc_op = CC_OP_FLAGS;
- /* Adjust PC to end of the insn. */
- env->pc += 2;
-
- cs->exception_index = EXCP_CHK;
- cpu_loop_exit(cs);
+ raise_exception_format2(env, EXCP_CHK, 2, GETPC());
}
}
@@ -1097,17 +1112,6 @@ void HELPER(chk2)(CPUM68KState *env, int32_t val,
int32_t lb, int32_t ub)
env->cc_c = lb <= ub ? val < lb || val > ub : val > ub && val < lb;
if (env->cc_c) {
- CPUState *cs = env_cpu(env);
-
- /* Recover PC and CC_OP for the beginning of the insn. */
- cpu_restore_state(cs, GETPC(), true);
-
- /* flags have been modified by gen_flush_flags() */
- env->cc_op = CC_OP_FLAGS;
- /* Adjust PC to end of the insn. */
- env->pc += 4;
-
- cs->exception_index = EXCP_CHK;
- cpu_loop_exit(cs);
+ raise_exception_format2(env, EXCP_CHK, 4, GETPC());
}
}
--
2.36.1
- [PULL 00/19] M68k for 7.1 patches, Laurent Vivier, 2022/06/02
- [PULL 01/19] target/m68k: Clear mach in m68k_cpu_disas_set_info, Laurent Vivier, 2022/06/02
- [PULL 02/19] target/m68k: Enable halt insn for 68060, Laurent Vivier, 2022/06/02
- [PULL 06/19] linux-user/m68k: Handle EXCP_TRAP1 through EXCP_TRAP15, Laurent Vivier, 2022/06/02
- [PULL 04/19] target/m68k: Switch over exception type in m68k_interrupt_all, Laurent Vivier, 2022/06/02
- [PULL 03/19] target/m68k: Raise the TRAPn exception with the correct pc, Laurent Vivier, 2022/06/02
- [PULL 07/19] target/m68k: Remove retaddr in m68k_interrupt_all, Laurent Vivier, 2022/06/02
- [PULL 08/19] target/m68k: Fix address argument for EXCP_CHK,
Laurent Vivier <=
- [PULL 18/19] linux-user/strace: Adjust get_thread_area for m68k, Laurent Vivier, 2022/06/02
- [PULL 12/19] target/m68k: Implement TRAPcc, Laurent Vivier, 2022/06/02
- [PULL 14/19] target/m68k: Implement TRAPV, Laurent Vivier, 2022/06/02
- [PULL 15/19] target/m68k: Implement FTRAPcc, Laurent Vivier, 2022/06/02
- [PULL 16/19] tests/tcg/m68k: Add trap.c, Laurent Vivier, 2022/06/02
- [PULL 09/19] target/m68k: Fix pc, c flag, and address argument for EXCP_DIV0, Laurent Vivier, 2022/06/02
- [PULL 11/19] target/m68k: Fix stack frame for EXCP_ILLEGAL, Laurent Vivier, 2022/06/02
- [PULL 05/19] target/m68k: Fix coding style in m68k_interrupt_all, Laurent Vivier, 2022/06/02
- [PULL 10/19] target/m68k: Fix address argument for EXCP_TRACE, Laurent Vivier, 2022/06/02
- [PULL 13/19] target/m68k: Implement TPF in terms of TRAPcc, Laurent Vivier, 2022/06/02