Re: [PATCH RFC 04/10] intel_iommu: Second Stage Access Dirty bit support

[Peter Xu]

On Fri, Apr 29, 2022 at 10:12:01AM +0100, Joao Martins wrote:
> On 4/29/22 03:26, Jason Wang wrote:
> > On Fri, Apr 29, 2022 at 5:14 AM Joao Martins <joao.m.martins@oracle.com> 
> > wrote:
> >> @@ -3693,7 +3759,8 @@ static void vtd_init(IntelIOMMUState *s)
> >>
> >>      /* TODO: read cap/ecap from host to decide which cap to be exposed. */
> >>      if (s->scalable_mode) {
> >> -        s->ecap |= VTD_ECAP_SMTS | VTD_ECAP_SRS | VTD_ECAP_SLTS;
> >> +        s->ecap |= VTD_ECAP_SMTS | VTD_ECAP_SRS | VTD_ECAP_SLTS |
> >> +                   VTD_ECAP_SLADS;
> >>      }
> > 
> > We probably need a dedicated command line parameter and make it compat
> > for pre 7.1 machines.
> > 
> > Otherwise we may break migration.
> 
> I can gate over an 'x-ssads' option (default disabled). Which reminds me that 
> I probably
> should rename to the most recent mnemonic (as SLADS no longer exists in 
> manuals).
> 
> If we all want by default enabled I can add a separate patch to do so.

The new option sounds good.

Jason, per our previous discussion, shall we not worry about the
compatibility issues per machine-type until the whole feature reaches a
mostly-complete stage?

There seems to have a bunch of sub-features for scalable mode and it's a
large project as a whole.  I'm worried trying to maintain compatibilities
for all the small sub-features could be an unnessary burden to the code
base.

Thanks,

-- 
Peter Xu