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[PULL 14/31] tcg/loongarch64: Implement bswap{16,32,64} ops
From: |
Richard Henderson |
Subject: |
[PULL 14/31] tcg/loongarch64: Implement bswap{16,32,64} ops |
Date: |
Tue, 21 Dec 2021 08:47:20 -0800 |
From: WANG Xuerui <git@xen0n.name>
Signed-off-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211221054105.178795-15-git@xen0n.name>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.h | 10 +++++-----
tcg/loongarch64/tcg-target.c.inc | 32 ++++++++++++++++++++++++++++++++
2 files changed, 37 insertions(+), 5 deletions(-)
diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h
index 1c9d0a9988..5303001653 100644
--- a/tcg/loongarch64/tcg-target.h
+++ b/tcg/loongarch64/tcg-target.h
@@ -111,8 +111,8 @@ typedef enum {
#define TCG_TARGET_HAS_ext16s_i32 1
#define TCG_TARGET_HAS_ext8u_i32 1
#define TCG_TARGET_HAS_ext16u_i32 1
-#define TCG_TARGET_HAS_bswap16_i32 0
-#define TCG_TARGET_HAS_bswap32_i32 0
+#define TCG_TARGET_HAS_bswap16_i32 1
+#define TCG_TARGET_HAS_bswap32_i32 1
#define TCG_TARGET_HAS_not_i32 1
#define TCG_TARGET_HAS_neg_i32 0
#define TCG_TARGET_HAS_andc_i32 1
@@ -146,9 +146,9 @@ typedef enum {
#define TCG_TARGET_HAS_ext8u_i64 1
#define TCG_TARGET_HAS_ext16u_i64 1
#define TCG_TARGET_HAS_ext32u_i64 1
-#define TCG_TARGET_HAS_bswap16_i64 0
-#define TCG_TARGET_HAS_bswap32_i64 0
-#define TCG_TARGET_HAS_bswap64_i64 0
+#define TCG_TARGET_HAS_bswap16_i64 1
+#define TCG_TARGET_HAS_bswap32_i64 1
+#define TCG_TARGET_HAS_bswap64_i64 1
#define TCG_TARGET_HAS_not_i64 1
#define TCG_TARGET_HAS_neg_i64 0
#define TCG_TARGET_HAS_andc_i64 1
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 9eba8f8146..3b056dd358 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -545,6 +545,33 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_opc_bstrins_d(s, a0, a2, args[3], args[3] + args[4] - 1);
break;
+ case INDEX_op_bswap16_i32:
+ case INDEX_op_bswap16_i64:
+ tcg_out_opc_revb_2h(s, a0, a1);
+ if (a2 & TCG_BSWAP_OS) {
+ tcg_out_ext16s(s, a0, a0);
+ } else if ((a2 & (TCG_BSWAP_IZ | TCG_BSWAP_OZ)) == TCG_BSWAP_OZ) {
+ tcg_out_ext16u(s, a0, a0);
+ }
+ break;
+
+ case INDEX_op_bswap32_i32:
+ /* All 32-bit values are computed sign-extended in the register. */
+ a2 = TCG_BSWAP_OS;
+ /* fallthrough */
+ case INDEX_op_bswap32_i64:
+ tcg_out_opc_revb_2w(s, a0, a1);
+ if (a2 & TCG_BSWAP_OS) {
+ tcg_out_ext32s(s, a0, a0);
+ } else if ((a2 & (TCG_BSWAP_IZ | TCG_BSWAP_OZ)) == TCG_BSWAP_OZ) {
+ tcg_out_ext32u(s, a0, a0);
+ }
+ break;
+
+ case INDEX_op_bswap64_i64:
+ tcg_out_opc_revb_d(s, a0, a1);
+ break;
+
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
default:
@@ -576,6 +603,11 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
case INDEX_op_not_i64:
case INDEX_op_extract_i32:
case INDEX_op_extract_i64:
+ case INDEX_op_bswap16_i32:
+ case INDEX_op_bswap16_i64:
+ case INDEX_op_bswap32_i32:
+ case INDEX_op_bswap32_i64:
+ case INDEX_op_bswap64_i64:
return C_O1_I1(r, r);
case INDEX_op_andc_i32:
--
2.25.1
- [PULL 00/31] tcg/loongarch64: New tcg backend, Richard Henderson, 2021/12/21
- [PULL 01/31] elf: Add machine type value for LoongArch, Richard Henderson, 2021/12/21
- [PULL 02/31] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer, Richard Henderson, 2021/12/21
- [PULL 03/31] tcg/loongarch64: Add the tcg-target.h file, Richard Henderson, 2021/12/21
- [PULL 05/31] tcg/loongarch64: Add register names, allocation order and input/output sets, Richard Henderson, 2021/12/21
- [PULL 09/31] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi, Richard Henderson, 2021/12/21
- [PULL 04/31] tcg/loongarch64: Add generated instruction opcodes and encoding helpers, Richard Henderson, 2021/12/21
- [PULL 07/31] tcg/loongarch64: Implement necessary relocation operations, Richard Henderson, 2021/12/21
- [PULL 06/31] tcg/loongarch64: Define the operand constraints, Richard Henderson, 2021/12/21
- [PULL 14/31] tcg/loongarch64: Implement bswap{16,32,64} ops,
Richard Henderson <=
- [PULL 13/31] tcg/loongarch64: Implement deposit/extract ops, Richard Henderson, 2021/12/21
- [PULL 12/31] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops, Richard Henderson, 2021/12/21
- [PULL 15/31] tcg/loongarch64: Implement clz/ctz ops, Richard Henderson, 2021/12/21
- [PULL 16/31] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops, Richard Henderson, 2021/12/21
- [PULL 17/31] tcg/loongarch64: Implement add/sub ops, Richard Henderson, 2021/12/21
- [PULL 18/31] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops, Richard Henderson, 2021/12/21
- [PULL 19/31] tcg/loongarch64: Implement br/brcond ops, Richard Henderson, 2021/12/21
- [PULL 11/31] tcg/loongarch64: Implement sign-/zero-extension ops, Richard Henderson, 2021/12/21
- [PULL 23/31] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops, Richard Henderson, 2021/12/21
- [PULL 20/31] tcg/loongarch64: Implement setcond ops, Richard Henderson, 2021/12/21