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[PATCH v10 08/31] tcg/loongarch64: Implement the memory barrier op
From: |
WANG Xuerui |
Subject: |
[PATCH v10 08/31] tcg/loongarch64: Implement the memory barrier op |
Date: |
Wed, 15 Dec 2021 20:51:13 +0800 |
Signed-off-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
tcg/loongarch64/tcg-target.c.inc | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index a88ba9a253..615bed9096 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -234,3 +234,35 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
g_assert_not_reached();
}
}
+
+#include "tcg-insn-defs.c.inc"
+
+/*
+ * TCG intrinsics
+ */
+
+static void tcg_out_mb(TCGContext *s, TCGArg a0)
+{
+ /* Baseline LoongArch only has the full barrier, unfortunately. */
+ tcg_out_opc_dbar(s, 0);
+}
+
+/*
+ * Entry-points
+ */
+
+static void tcg_out_op(TCGContext *s, TCGOpcode opc,
+ const TCGArg args[TCG_MAX_OP_ARGS],
+ const int const_args[TCG_MAX_OP_ARGS])
+{
+ TCGArg a0 = args[0];
+
+ switch (opc) {
+ case INDEX_op_mb:
+ tcg_out_mb(s, a0);
+ break;
+
+ default:
+ g_assert_not_reached();
+ }
+}
--
2.34.0
- [PATCH v10 04/31] tcg/loongarch64: Add generated instruction opcodes and encoding helpers, (continued)
- [PATCH v10 04/31] tcg/loongarch64: Add generated instruction opcodes and encoding helpers, WANG Xuerui, 2021/12/15
- [PATCH v10 05/31] tcg/loongarch64: Add register names, allocation order and input/output sets, WANG Xuerui, 2021/12/15
- [PATCH v10 01/31] elf: Add machine type value for LoongArch, WANG Xuerui, 2021/12/15
- [PATCH v10 09/31] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi, WANG Xuerui, 2021/12/15
- [PATCH v10 12/31] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops, WANG Xuerui, 2021/12/15
- [PATCH v10 13/31] tcg/loongarch64: Implement deposit/extract ops, WANG Xuerui, 2021/12/15
- [PATCH v10 15/31] tcg/loongarch64: Implement clz/ctz ops, WANG Xuerui, 2021/12/15
- [PATCH v10 10/31] tcg/loongarch64: Implement goto_ptr, WANG Xuerui, 2021/12/15
- [PATCH v10 06/31] tcg/loongarch64: Define the operand constraints, WANG Xuerui, 2021/12/15
- [PATCH v10 07/31] tcg/loongarch64: Implement necessary relocation operations, WANG Xuerui, 2021/12/15
- [PATCH v10 08/31] tcg/loongarch64: Implement the memory barrier op,
WANG Xuerui <=
- [PATCH v10 11/31] tcg/loongarch64: Implement sign-/zero-extension ops, WANG Xuerui, 2021/12/15
- [PATCH v10 18/31] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops, WANG Xuerui, 2021/12/15
- [PATCH v10 16/31] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops, WANG Xuerui, 2021/12/15
- [PATCH v10 26/31] tcg/loongarch64: Implement tcg_target_init, WANG Xuerui, 2021/12/15
- [PATCH v10 17/31] tcg/loongarch64: Implement add/sub ops, WANG Xuerui, 2021/12/15
- [PATCH v10 20/31] tcg/loongarch64: Implement setcond ops, WANG Xuerui, 2021/12/15
- [PATCH v10 21/31] tcg/loongarch64: Implement tcg_out_call, WANG Xuerui, 2021/12/15
- [PATCH v10 23/31] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops, WANG Xuerui, 2021/12/15
- [PATCH v10 25/31] tcg/loongarch64: Implement exit_tb/goto_tb, WANG Xuerui, 2021/12/15
- [PATCH v10 19/31] tcg/loongarch64: Implement br/brcond ops, WANG Xuerui, 2021/12/15