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[PATCH 07/26] hw/intc/arm_gicv3_its: Correct setting of TableDesc entry_
From: |
Peter Maydell |
Subject: |
[PATCH 07/26] hw/intc/arm_gicv3_its: Correct setting of TableDesc entry_sz |
Date: |
Sat, 11 Dec 2021 19:11:16 +0000 |
We set the TableDesc entry_sz field from the appropriate
GITS_BASER.ENTRYSIZE field. That ID register field specifies the
number of bytes per table entry minus one. However when we use
td->entry_sz we assume it to be the number of bytes per table entry
(for instance we calculate the number of entries in a page by
dividing the page size by the entry size).
The effects of this bug are:
* we miscalculate the maximum number of entries in the table,
so our checks on guest index values are wrong (too lax)
* when looking up an entry in the second level of an indirect
table, we calculate an incorrect index into the L2 table.
Because we make the same incorrect calculation on both
reads and writes of the L2 table, the guest won't notice
unless it's unlucky enough to use an index value that
causes us to index off the end of the L2 table page and
cause guest memory corruption in whatever follows
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/intc/arm_gicv3_its.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index 84808b1e298..88f4d730999 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -829,7 +829,7 @@ static void extract_table_params(GICv3ITSState *s)
}
td->page_sz = page_sz;
td->indirect = FIELD_EX64(value, GITS_BASER, INDIRECT);
- td->entry_sz = FIELD_EX64(value, GITS_BASER, ENTRYSIZE);
+ td->entry_sz = FIELD_EX64(value, GITS_BASER, ENTRYSIZE) + 1;
td->base_addr = baser_base_addr(value, page_sz);
if (!td->indirect) {
td->max_entries = (num_pages * page_sz) / td->entry_sz;
--
2.25.1
- [PATCH 08/26] hw/intc/arm_gicv3_its: Don't misuse GITS_TYPE_PHYSICAL define, (continued)
- [PATCH 08/26] hw/intc/arm_gicv3_its: Don't misuse GITS_TYPE_PHYSICAL define, Peter Maydell, 2021/12/11
- [PATCH 16/26] hw/intc/arm_gicv3_its: Fix event ID bounds checks, Peter Maydell, 2021/12/11
- [PATCH 18/26] hw/intc/arm_gicv3_its: Fix handling of process_its_cmd() return value, Peter Maydell, 2021/12/11
- [PATCH 07/26] hw/intc/arm_gicv3_its: Correct setting of TableDesc entry_sz,
Peter Maydell <=
- [PATCH 09/26] hw/intc/arm_gicv3_its: Correct handling of MAPI, Peter Maydell, 2021/12/11
- [PATCH 14/26] hw/intc/arm_gicv3_its: Fix various off-by-one errors, Peter Maydell, 2021/12/11
- [PATCH 12/26] hw/intc/arm_gicv3_its: Correct comment about CTE RDBase field size, Peter Maydell, 2021/12/11