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Re: [PATCH v3 02/10] hw/arm/xlnx-versal: Connect Versal's PMC SLCR
From: |
Peter Maydell |
Subject: |
Re: [PATCH v3 02/10] hw/arm/xlnx-versal: Connect Versal's PMC SLCR |
Date: |
Mon, 29 Nov 2021 17:32:02 +0000 |
On Wed, 24 Nov 2021 at 10:16, Francisco Iglesias
<francisco.iglesias@xilinx.com> wrote:
>
> Connect Versal's PMC SLCR (system-level control registers) model.
>
> Signed-off-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
> hw/arm/xlnx-versal.c | 18 ++++++++++++++++++
> include/hw/arm/xlnx-versal.h | 6 ++++++
> 2 files changed, 24 insertions(+)
>
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index b2705b6925..08e250945f 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -369,6 +369,23 @@ static void versal_create_efuse(Versal *s, qemu_irq *pic)
> sysbus_connect_irq(SYS_BUS_DEVICE(ctrl), 0, pic[VERSAL_EFUSE_IRQ]);
> }
>
> +static void versal_create_pmc_iou_slcr(Versal *s, qemu_irq *pic)
> +{
> + SysBusDevice *sbd;
> +
> + object_initialize_child(OBJECT(s), "versal-pmc-iou-slcr",
> &s->pmc.iou.slcr,
> + TYPE_XILINX_VERSAL_PMC_IOU_SLCR);
> +
> + sbd = SYS_BUS_DEVICE(&s->pmc.iou.slcr);
> + sysbus_realize(sbd, &error_fatal);
> +
> + memory_region_add_subregion(&s->mr_ps, MM_PMC_PMC_IOU_SLCR,
> + sysbus_mmio_get_region(sbd, 0));
Nit: the indent here is wrong.
Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
- [PATCH v3 00/10] Xilinx Versal's PMC SLCR and OSPI support, Francisco Iglesias, 2021/11/24
- [PATCH v3 02/10] hw/arm/xlnx-versal: Connect Versal's PMC SLCR, Francisco Iglesias, 2021/11/24
- Re: [PATCH v3 02/10] hw/arm/xlnx-versal: Connect Versal's PMC SLCR,
Peter Maydell <=
- [PATCH v3 03/10] include/hw/dma/xlnx_csu_dma: Add in missing includes in the header, Francisco Iglesias, 2021/11/24
- [PATCH v3 01/10] hw/misc: Add a model of Versal's PMC SLCR, Francisco Iglesias, 2021/11/24
- [PATCH v3 04/10] hw/dma: Add the DMA control interface, Francisco Iglesias, 2021/11/24
- [PATCH v3 08/10] hw/block/m25p80: Add support for Micron Xccela flash mt35xu01g, Francisco Iglesias, 2021/11/24
- [PATCH v3 06/10] hw/ssi: Add a model of Xilinx Versal's OSPI flash memory controller, Francisco Iglesias, 2021/11/24
- [PATCH v3 10/10] MAINTAINERS: Add an entry for Xilinx Versal OSPI, Francisco Iglesias, 2021/11/24
- [PATCH v3 05/10] hw/dma/xlnx_csu_dma: Implement the DMA control interface, Francisco Iglesias, 2021/11/24
- [PATCH v3 07/10] hw/arm/xlnx-versal: Connect the OSPI flash memory controller model, Francisco Iglesias, 2021/11/24