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[PATCH v10 54/77] target/riscv: rvv-1.0: widening floating-point reducti
From: |
frank . chang |
Subject: |
[PATCH v10 54/77] target/riscv: rvv-1.0: widening floating-point reduction instructions |
Date: |
Mon, 29 Nov 2021 11:03:14 +0800 |
From: Frank Chang <frank.chang@sifive.com>
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/insn_trans/trans_rvv.c.inc | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
b/target/riscv/insn_trans/trans_rvv.c.inc
index 998247d71d9..b43234ed3ff 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -2648,7 +2648,14 @@ GEN_OPFVV_TRANS(vfredmax_vs, freduction_check)
GEN_OPFVV_TRANS(vfredmin_vs, freduction_check)
/* Vector Widening Floating-Point Reduction Instructions */
-GEN_OPFVV_WIDEN_TRANS(vfwredsum_vs, reduction_check)
+static bool freduction_widen_check(DisasContext *s, arg_rmrr *a)
+{
+ return reduction_widen_check(s, a) &&
+ require_scale_rvf(s) &&
+ (s->sew != MO_8);
+}
+
+GEN_OPFVV_WIDEN_TRANS(vfwredsum_vs, freduction_widen_check)
/*
*** Vector Mask Operations
--
2.25.1
- [PATCH v10 42/77] target/riscv: rvv-1.0: single-width bit shift instructions, (continued)
- [PATCH v10 42/77] target/riscv: rvv-1.0: single-width bit shift instructions, frank . chang, 2021/11/28
- [PATCH v10 43/77] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow, frank . chang, 2021/11/28
- [PATCH v10 45/77] target/riscv: rvv-1.0: widening integer multiply-add instructions, frank . chang, 2021/11/28
- [PATCH v10 47/77] target/riscv: rvv-1.0: integer comparison instructions, frank . chang, 2021/11/28
- [PATCH v10 48/77] target/riscv: rvv-1.0: floating-point compare instructions, frank . chang, 2021/11/28
- [PATCH v10 49/77] target/riscv: rvv-1.0: mask-register logical instructions, frank . chang, 2021/11/28
- [PATCH v10 50/77] target/riscv: rvv-1.0: slide instructions, frank . chang, 2021/11/28
- [PATCH v10 51/77] target/riscv: rvv-1.0: floating-point slide instructions, frank . chang, 2021/11/28
- [PATCH v10 52/77] target/riscv: rvv-1.0: narrowing fixed-point clip instructions, frank . chang, 2021/11/28
- [PATCH v10 53/77] target/riscv: rvv-1.0: single-width floating-point reduction, frank . chang, 2021/11/28
- [PATCH v10 54/77] target/riscv: rvv-1.0: widening floating-point reduction instructions,
frank . chang <=
- [PATCH v10 55/77] target/riscv: rvv-1.0: single-width scaling shift instructions, frank . chang, 2021/11/28
- [PATCH v10 57/77] target/riscv: rvv-1.0: remove vmford.vv and vmford.vf, frank . chang, 2021/11/28
- [PATCH v10 58/77] target/riscv: rvv-1.0: remove integer extract instruction, frank . chang, 2021/11/28
- [PATCH v10 56/77] target/riscv: rvv-1.0: remove widening saturating scaled multiply-add, frank . chang, 2021/11/28
- [PATCH v10 59/77] target/riscv: rvv-1.0: floating-point min/max instructions, frank . chang, 2021/11/28
- [PATCH v10 60/77] target/riscv: introduce floating-point rounding mode enum, frank . chang, 2021/11/28
- [PATCH v10 62/77] target/riscv: rvv-1.0: widening floating-point/integer type-convert, frank . chang, 2021/11/28
- [PATCH v10 61/77] target/riscv: rvv-1.0: floating-point/integer type-convert instructions, frank . chang, 2021/11/28
- [PATCH v10 63/77] target/riscv: add "set round to odd" rounding mode helper function, frank . chang, 2021/11/28
- [PATCH v10 64/77] target/riscv: rvv-1.0: narrowing floating-point/integer type-convert, frank . chang, 2021/11/28