Re: [PATCH v10 04/26] target/loongarch: Add fixed point arithmetic instruction translation

[Richard Henderson]

On 11/15/21 4:59 AM, gaosong wrote:
> 'The width of the immediate is a detail of the format'  means:
>
> &fmt_rdrjimm         rd  rj imm
>
> @fmt_rdrjimm         .... ...... imm:12  rj:5 rd:5     &fmt_rdrjimm
> @fmt_rdrjimm14         .... .... imm:14  rj:5 rd:5     &fmt_rdrjimm
> @fmt_rdrjimm16           .... .. imm:16  rj:5 rd:5     &fmt_rdrjimm
>
> and we print in the disassembly, liks this
>
> output_rdrjimm(DisasContext *ctx, arg_fmt_rdrjimm * a,  const char *mnemonic)
> {
>      output(ctx, mnemonic, "%s, %s, 0x%x", regnames[a->rd], regnames[a->rj], 
> a->imm);
> }
>
> is that right?

Yes.

I'll note that regnames[] is defined in target/loongarch/cpu.c, which is not available 
when we want to use this disassembler for tcg/loongarch64/.  I think it would be easier to 
print this as

    "r%d", a->rd

so that you do not need to rely on the external strings.

I also think you should print signed numbers, "%d", because 0xfffffff8 (truncated to 32 
bits) is not really the correct representation of -8 for a 64-bit operand.


> 1. We print sa in disassembly...
> 2. We use sa on gen_alsl_* not (sa2+1).
> 3. bytepick_w use the same print functions.
> Is my understanding right?

Yes, that is the issue I am describing.


r~