qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [ PATCH v3 01/10] target/riscv: Fix PMU CSR predicate function


From: Bin Meng
Subject: Re: [ PATCH v3 01/10] target/riscv: Fix PMU CSR predicate function
Date: Thu, 4 Nov 2021 19:00:32 +0800

On Tue, Oct 26, 2021 at 4:39 AM Atish Patra <atish.patra@wdc.com> wrote:
>
> The predicate function calculates the counter index incorrectly for
> hpmcounterx. Fix the counter index to reflect correct CSR number.
>

Fixes: e39a8320b088 ("target/riscv: Support the Virtual Instruction fault")

> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
>  target/riscv/csr.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>



reply via email to

[Prev in Thread] Current Thread [Next in Thread]