[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 18/27] KVM: SVM: add migration support for nested TSC scaling
From: |
Paolo Bonzini |
Subject: |
[PULL 18/27] KVM: SVM: add migration support for nested TSC scaling |
Date: |
Wed, 3 Nov 2021 16:04:33 +0100 |
From: Maxim Levitsky <mlevitsk@redhat.com>
Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20211101132300.192584-4-mlevitsk@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/cpu.c | 5 +++++
target/i386/cpu.h | 4 ++++
target/i386/kvm/kvm.c | 15 +++++++++++++++
target/i386/machine.c | 22 ++++++++++++++++++++++
4 files changed, 46 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 598d451dcf..53a23ca006 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5928,6 +5928,11 @@ static void x86_cpu_reset(DeviceState *dev)
}
x86_cpu_set_sgxlepubkeyhash(env);
+
+ if (env->features[FEAT_SVM] & CPUID_SVM_TSCSCALE) {
+ env->amd_tsc_scale_msr = MSR_AMD64_TSC_RATIO_DEFAULT;
+ }
+
#endif
}
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 3edaad7688..04f2b790c9 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -499,6 +499,9 @@ typedef enum X86Seg {
#define MSR_GSBASE 0xc0000101
#define MSR_KERNELGSBASE 0xc0000102
#define MSR_TSC_AUX 0xc0000103
+#define MSR_AMD64_TSC_RATIO 0xc0000104
+
+#define MSR_AMD64_TSC_RATIO_DEFAULT 0x100000000ULL
#define MSR_VM_HSAVE_PA 0xc0010117
@@ -1536,6 +1539,7 @@ typedef struct CPUX86State {
uint32_t tsx_ctrl;
uint64_t spec_ctrl;
+ uint64_t amd_tsc_scale_msr;
uint64_t virt_ssbd;
/* End of state preserved by INIT (dummy marker). */
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 0eb7a0340c..5a698bde19 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -105,6 +105,7 @@ static bool has_msr_hv_reenlightenment;
static bool has_msr_xss;
static bool has_msr_umwait;
static bool has_msr_spec_ctrl;
+static bool has_tsc_scale_msr;
static bool has_msr_tsx_ctrl;
static bool has_msr_virt_ssbd;
static bool has_msr_smi_count;
@@ -2216,6 +2217,9 @@ static int kvm_get_supported_msrs(KVMState *s)
case MSR_IA32_SPEC_CTRL:
has_msr_spec_ctrl = true;
break;
+ case MSR_AMD64_TSC_RATIO:
+ has_tsc_scale_msr = true;
+ break;
case MSR_IA32_TSX_CTRL:
has_msr_tsx_ctrl = true;
break;
@@ -2972,6 +2976,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
if (has_msr_spec_ctrl) {
kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, env->spec_ctrl);
}
+ if (has_tsc_scale_msr) {
+ kvm_msr_entry_add(cpu, MSR_AMD64_TSC_RATIO, env->amd_tsc_scale_msr);
+ }
+
if (has_msr_tsx_ctrl) {
kvm_msr_entry_add(cpu, MSR_IA32_TSX_CTRL, env->tsx_ctrl);
}
@@ -3377,6 +3385,10 @@ static int kvm_get_msrs(X86CPU *cpu)
if (has_msr_spec_ctrl) {
kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, 0);
}
+ if (has_tsc_scale_msr) {
+ kvm_msr_entry_add(cpu, MSR_AMD64_TSC_RATIO, 0);
+ }
+
if (has_msr_tsx_ctrl) {
kvm_msr_entry_add(cpu, MSR_IA32_TSX_CTRL, 0);
}
@@ -3788,6 +3800,9 @@ static int kvm_get_msrs(X86CPU *cpu)
case MSR_IA32_SPEC_CTRL:
env->spec_ctrl = msrs[i].data;
break;
+ case MSR_AMD64_TSC_RATIO:
+ env->amd_tsc_scale_msr = msrs[i].data;
+ break;
case MSR_IA32_TSX_CTRL:
env->tsx_ctrl = msrs[i].data;
break;
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 4367931623..83c2b91529 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -1280,6 +1280,27 @@ static const VMStateDescription vmstate_spec_ctrl = {
}
};
+
+static bool amd_tsc_scale_msr_needed(void *opaque)
+{
+ X86CPU *cpu = opaque;
+ CPUX86State *env = &cpu->env;
+
+ return (env->features[FEAT_SVM] & CPUID_SVM_TSCSCALE);
+}
+
+static const VMStateDescription amd_tsc_scale_msr_ctrl = {
+ .name = "cpu/amd_tsc_scale_msr",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = amd_tsc_scale_msr_needed,
+ .fields = (VMStateField[]){
+ VMSTATE_UINT64(env.amd_tsc_scale_msr, X86CPU),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+
static bool intel_pt_enable_needed(void *opaque)
{
X86CPU *cpu = opaque;
@@ -1558,6 +1579,7 @@ const VMStateDescription vmstate_x86_cpu = {
&vmstate_pkru,
&vmstate_pkrs,
&vmstate_spec_ctrl,
+ &amd_tsc_scale_msr_ctrl,
&vmstate_mcg_ext_ctl,
&vmstate_msr_intel_pt,
&vmstate_msr_virt_ssbd,
--
2.31.1
- [PULL 26/27] configure: Remove the check for the __thread keyword, (continued)
- [PULL 26/27] configure: Remove the check for the __thread keyword, Paolo Bonzini, 2021/11/03
- [PULL 27/27] configure: fix --audio-drv-list help message, Paolo Bonzini, 2021/11/03
- [PULL 14/27] watchdog: add information from -watchdog help to -device help, Paolo Bonzini, 2021/11/03
- [PULL 22/27] meson.build: Allow to disable OSS again, Paolo Bonzini, 2021/11/03
- [PULL 23/27] meson: remove pointless warnings, Paolo Bonzini, 2021/11/03
- [PULL 24/27] meson: remove unnecessary coreaudio test program, Paolo Bonzini, 2021/11/03
- [PULL 19/27] esp: ensure in-flight SCSI requests are always cancelled, Paolo Bonzini, 2021/11/03
- [PULL 20/27] qtest/am53c974-test: add test for cancelling in-flight requests, Paolo Bonzini, 2021/11/03
- [PULL 16/27] watchdog: remove select_watchdog_action, Paolo Bonzini, 2021/11/03
- [PULL 13/27] hw/i386: Rename default_bus_bypass_iommu, Paolo Bonzini, 2021/11/03
- [PULL 18/27] KVM: SVM: add migration support for nested TSC scaling,
Paolo Bonzini <=
- [PULL 21/27] meson: bump submodule to 0.59.3, Paolo Bonzini, 2021/11/03
- [PULL 25/27] Move the l2tpv3 test from configure to meson.build, Paolo Bonzini, 2021/11/03
- Re: [PULL 00/27] Misc patches for QEMU 6.2 soft freeze, Richard Henderson, 2021/11/04