[PULL 00/41] MIPS patches for 2021-11-02

[Philippe Mathieu-Daudé]

The following changes since commit 844d6dfc3e48a8d404b03ea815868fd01c6f7317:

  Merge remote-tracking branch 
'remotes/alex.williamson/tags/vfio-update-20211101.0' into staging (2021-11-02 
07:25:59 -0400)

are available in the Git repository at:

  https://github.com/philmd/qemu.git tags/mips-20211102

for you to fetch changes up to 6f08c9c5316a80a049d4861eaac5844466ba3eba:

  Revert "elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too" 
(2021-11-02 14:35:22 +0100)

----------------------------------------------------------------
MIPS patches queue

- Fine-grained MAINTAINERS sections
- Fix MSA MADDV.B / MSUBV.B opcodes
- Convert MSA opcodes to decodetree
- Correct Loongson-3A4000 MSAIR register
- Do not accept ELF nanoMIPS binaries on linux-user
- Use ISA instead of PCI interrupts in VT82C686 PCI device

----------------------------------------------------------------

BALATON Zoltan (4):
  usb/uhci: Misc clean up
  usb/uhci: Disallow user creating a vt82c686-uhci-pci device
  usb/uhci: Replace pci_set_irq with qemu_set_irq
  hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts

Philippe Mathieu-Daudé (37):
  MAINTAINERS: Add MIPS general architecture support entry
  MAINTAINERS: Add entries to cover MIPS CPS / GIC hardware
  MAINTAINERS: Split MIPS TCG frontend vs MIPS machines/hardware
  target/mips: Fix MSA MADDV.B opcode
  target/mips: Fix MSA MSUBV.B opcode
  target/mips: Adjust style in msa_translate_init()
  target/mips: Use dup_const() to simplify
  target/mips: Have check_msa_access() return a boolean
  target/mips: Use enum definitions from CPUMIPSMSADataFormat enum
  target/mips: Rename sa16 -> sa, bz_df -> bz -> bz_v
  target/mips: Convert MSA LDI opcode to decodetree
  target/mips: Convert MSA I5 instruction format to decodetree
  target/mips: Convert MSA BIT instruction format to decodetree
  target/mips: Convert MSA SHF opcode to decodetree
  target/mips: Convert MSA I8 instruction format to decodetree
  target/mips: Convert MSA load/store instruction format to decodetree
  target/mips: Convert MSA 2RF instruction format to decodetree
  target/mips: Convert MSA FILL opcode to decodetree
  target/mips: Convert MSA 2R instruction format to decodetree
  target/mips: Convert MSA VEC instruction format to decodetree
  target/mips: Convert MSA 3RF instruction format to decodetree
    (DF_HALF)
  target/mips: Convert MSA 3RF instruction format to decodetree
    (DF_WORD)
  target/mips: Convert MSA 3R instruction format to decodetree (part
    1/4)
  target/mips: Convert MSA 3R instruction format to decodetree (part
    2/4)
  target/mips: Convert MSA 3R instruction format to decodetree (part
    3/4)
  target/mips: Convert MSA 3R instruction format to decodetree (part
    4/4)
  target/mips: Convert MSA ELM instruction format to decodetree
  target/mips: Convert MSA COPY_U opcode to decodetree
  target/mips: Convert MSA COPY_S and INSERT opcodes to decodetree
  target/mips: Convert MSA MOVE.V opcode to decodetree
  target/mips: Convert CFCMSA opcode to decodetree
  target/mips: Convert CTCMSA opcode to decodetree
  target/mips: Remove generic MSA opcode
  target/mips: Remove one MSA unnecessary decodetree overlap group
  target/mips: Fix Loongson-3A4000 MSAIR config register
  target/mips: Remove obsolete FCR0_HAS2008 comment on P5600 CPU
  Revert "elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS too"

 hw/usb/hcd-uhci.h               |    3 +-
 target/mips/tcg/msa.decode      |  243 ++-
 hw/usb/hcd-uhci.c               |   14 +-
 hw/usb/vt82c686-uhci-pci.c      |   15 +
 linux-user/elfload.c            |    2 -
 target/mips/tcg/msa_helper.c    |   64 +-
 target/mips/tcg/msa_translate.c | 2743 +++++++------------------------
 target/mips/cpu-defs.c.inc      |    2 +-
 MAINTAINERS                     |   37 +-
 9 files changed, 957 insertions(+), 2166 deletions(-)

-- 
2.31.1