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[PATCH v7 32/60] linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPE
From: |
Richard Henderson |
Subject: |
[PATCH v7 32/60] linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPE |
Date: |
Mon, 1 Nov 2021 13:27:01 -0400 |
QEMU does not allow the system control bits for either exception to
be enabled in linux-user, therefore both exceptions are dead code.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
linux-user/openrisc/cpu_loop.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c
index f6360db47c..10b7147f68 100644
--- a/linux-user/openrisc/cpu_loop.c
+++ b/linux-user/openrisc/cpu_loop.c
@@ -56,7 +56,6 @@ void cpu_loop(CPUOpenRISCState *env)
break;
case EXCP_DPF:
case EXCP_IPF:
- case EXCP_RANGE:
info.si_signo = TARGET_SIGSEGV;
info.si_errno = 0;
info.si_code = TARGET_SEGV_MAPERR;
@@ -77,13 +76,6 @@ void cpu_loop(CPUOpenRISCState *env)
info._sifields._sigfault._addr = env->pc;
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
break;
- case EXCP_FPE:
- info.si_signo = TARGET_SIGFPE;
- info.si_errno = 0;
- info.si_code = 0;
- info._sifields._sigfault._addr = env->pc;
- queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
- break;
case EXCP_INTERRUPT:
/* We processed the pending cpu work above. */
break;
@@ -96,6 +88,15 @@ void cpu_loop(CPUOpenRISCState *env)
case EXCP_ATOMIC:
cpu_exec_step_atomic(cs);
break;
+ case EXCP_RANGE:
+ /* Requires SR.OVE set, which linux-user won't do. */
+ cpu_abort(cs, "Unexpected RANGE exception");
+ case EXCP_FPE:
+ /*
+ * Requires FPSCR.FPEE set. Writes to FPSCR from usermode not
+ * yet enabled in kernel ABI, so linux-user does not either.
+ */
+ cpu_abort(cs, "Unexpected FPE exception");
default:
g_assert_not_reached();
}
--
2.25.1
- [PATCH v7 27/60] target/i386: Implement x86_cpu_record_sigsegv, (continued)
- [PATCH v7 27/60] target/i386: Implement x86_cpu_record_sigsegv, Richard Henderson, 2021/11/01
- [PATCH v7 15/60] linux-user/host/riscv: Populate host_signal.h, Richard Henderson, 2021/11/01
- [PATCH v7 19/60] hw/core: Add TCGCPUOps.record_sigsegv, Richard Henderson, 2021/11/01
- [PATCH v7 31/60] target/nios2: Implement nios2_cpu_record_sigsegv, Richard Henderson, 2021/11/01
- [PATCH v7 39/60] target/sparc: Make sparc_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/01
- [PATCH v7 26/60] target/hppa: Make hppa_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/01
- [PATCH v7 09/60] linux-user/host/alpha: Populate host_signal.h, Richard Henderson, 2021/11/01
- [PATCH v7 30/60] target/mips: Make mips_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/01
- [PATCH v7 22/60] target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup, Richard Henderson, 2021/11/01
- [PATCH v7 24/60] target/cris: Make cris_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/01
- [PATCH v7 32/60] linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPE,
Richard Henderson <=
- [PATCH v7 36/60] target/s390x: Use probe_access_flags in s390_probe_access, Richard Henderson, 2021/11/01
- [PATCH v7 37/60] target/s390x: Implement s390_cpu_record_sigsegv, Richard Henderson, 2021/11/01
- [PATCH v7 35/60] target/riscv: Make riscv_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/01
- [PATCH v7 25/60] target/hexagon: Remove hexagon_cpu_tlb_fill, Richard Henderson, 2021/11/01
- [PATCH v7 38/60] target/sh4: Make sh4_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/01
- [PATCH v7 33/60] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/01
- [PATCH v7 23/60] target/arm: Implement arm_cpu_record_sigsegv, Richard Henderson, 2021/11/01
- [PATCH v7 29/60] target/microblaze: Make mb_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/01
- [PATCH v7 42/60] hw/core: Add TCGCPUOps.record_sigbus, Richard Henderson, 2021/11/01
- [PATCH v7 40/60] target/xtensa: Make xtensa_cpu_tlb_fill sysemu only, Richard Henderson, 2021/11/01