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[PATCH v8 00/29] Add LoongArch linux-user emulation support


From: Song Gao
Subject: [PATCH v8 00/29] Add LoongArch linux-user emulation support
Date: Mon, 1 Nov 2021 17:51:22 +0800

Hi all,

This series only support linux-user emulation.
More about LoongArch at: https://github.com/loongson/

The latest kernel:
  * https://github.com/loongson/linux/tree/loongarch-next

Patches need review:
  * 0002-target-loongarch-Add-core-definition.patch
  * 0016-target-loongarch-Add-disassembler.patch
  * 0017-linux-user-Add-LoongArch-generic-header-files.patch
  * 0018-linux-user-Add-LoongArch-specific-structures.patch
  * 0019-linux-user-Add-LoongArch-signal-support.patch
  * 0020-linux-user-Add-LoongArch-elf-support.patch
  * 0021-linux-user-Add-LoongArch-syscall-support.patch
  * 0022-linux-user-Add-LoongArch-cpu_loop-support.patch
  * 0023-linux-user-Add-host-dependency-for-LoongArch-64-bit.patch
  * 0028-accel-tcg-user-exec-Implement-CPU-specific-signal-ha.patch
  * 0029-linux-user-Add-safe-syscall-handling-for-loongarch64.patch


Changes for v8:
  * Use the FIELD functions to define cpucfg[i].
  * Re-use the decodetree to disassembler description. 
  * Split v7 patch(0017-LoongArch-Linux-User-Emulation.patch).

Changes for v7:
  * scripts/gensyscalls.sh support loongarch64
    if we use gensyscalls.sh, we need disable __BITS_PER_LONG at 
arch/loongarch/include/uapi/asm/bitsperlong.h

Changes for v6:
  * Resolve patch10 and patch6 code issues.

Changes for v5:
  * Follow Richard's code review comments [1].
  * Use force_sig_fault().
  * Implement setup_sigtramp.

    [1]: 
https://patchew.org/QEMU/1630586467-22463-1-git-send-email-gaosong@loongson.cn/

Changes for v4:
  * Update README,add LoongArch linux-user emulation Introduction.
  * Add 'make check-tcg' support(patch 20).
  * Add binfmt config(patch 21).
  * Fix bugs when running loongarch basic commands.
Changes for v3:
  * Split trans.inc.c.
  * Remove csr registers.
  * Delete patchs 2, 4, 5.
  * Follow Richard's code review comments [1].
  * Follow Richard's riscv patches [2].

    [1]: 
https://patchew.org/QEMU/1626861198-6133-1-git-send-email-gaosong@loongson.cn/
    [2]: 
https://patchew.org/QEMU/20210823195529.560295-1-richard.henderson@linaro.org/

Changes for v2:
  * Patch 1, remove unnecessary introduction;
  * Patch 3, follow the ARM/AVR pattern to add new CPU features;
  * Patch 6, remove decode_lsx();
  * Patches 7-18, delete opcode definition, modify translation function;
  * Patches 20-22, split V1 patch20 to V2 patch20-22.

v7: 
https://patchew.org/QEMU/1634561247-25499-1-git-send-email-gaosong@loongson.cn/
V6: 
https://patchew.org/QEMU/1631866380-31017-1-git-send-email-gaosong@loongson.cn/
V5: 
https://patchew.org/QEMU/1631624431-30658-1-git-send-email-gaosong@loongson.cn/
V4: 
https://patchew.org/QEMU/1630586467-22463-1-git-send-email-gaosong@loongson.cn/
V3: 
https://patchew.org/QEMU/1630048494-2143-1-git-send-email-gaosong@loongson.cn/
V2: 
https://patchew.org/QEMU/1626861198-6133-1-git-send-email-gaosong@loongson.cn/
V1: 
https://patchew.org/QEMU/1624881885-31692-1-git-send-email-gaosong@loongson.cn/

Please review!

Thanks.


Song Gao (29):
  target/loongarch: Add README
  target/loongarch: Add core definition
  target/loongarch: Add main translation routines
  target/loongarch: Add fixed point arithmetic instruction translation
  target/loongarch: Add fixed point shift instruction translation
  target/loongarch: Add fixed point bit instruction translation
  target/loongarch: Add fixed point load/store instruction translation
  target/loongarch: Add fixed point atomic instruction translation
  target/loongarch: Add fixed point extra instruction translation
  target/loongarch: Add floating point arithmetic instruction
    translation
  target/loongarch: Add floating point comparison instruction
    translation
  target/loongarch: Add floating point conversion instruction
    translation
  target/loongarch: Add floating point move instruction translation
  target/loongarch: Add floating point load/store instruction
    translation
  target/loongarch: Add branch instruction translation
  target/loongarch: Add disassembler
  linux-user: Add LoongArch generic header files
  linux-user: Add LoongArch specific structures
  linux-user: Add LoongArch signal support
  linux-user: Add LoongArch elf support
  linux-user: Add LoongArch syscall support
  linux-user: Add LoongArch cpu_loop support
  linux-user: Add host dependency for LoongArch 64-bit
  default-configs: Add loongarch linux-user support
  target/loongarch: Add target build suport
  target/loongarch: 'make check-tcg' support
  scripts: add loongarch64 binfmt config
  accel/tcg/user-exec: Implement CPU-specific signal handler for
    loongarch64 hosts
  linux-user: Add safe syscall handling for loongarch64 hosts

 MAINTAINERS                                    |   5 +
 accel/tcg/user-exec.c                          |  73 ++
 configs/targets/loongarch64-linux-user.mak     |   3 +
 configure                                      |   5 +
 include/disas/dis-asm.h                        |   2 +
 include/elf.h                                  |   2 +
 linux-user/elfload.c                           |  58 ++
 linux-user/host/loongarch64/hostdep.h          |  34 +
 linux-user/host/loongarch64/safe-syscall.inc.S |  80 +++
 linux-user/loongarch64/cpu_loop.c              |  98 +++
 linux-user/loongarch64/signal.c                | 163 +++++
 linux-user/loongarch64/sockbits.h              |   1 +
 linux-user/loongarch64/syscall_nr.h            | 312 +++++++++
 linux-user/loongarch64/target_cpu.h            |  35 +
 linux-user/loongarch64/target_elf.h            |  14 +
 linux-user/loongarch64/target_errno_defs.h     |   7 +
 linux-user/loongarch64/target_fcntl.h          |  12 +
 linux-user/loongarch64/target_signal.h         |  30 +
 linux-user/loongarch64/target_structs.h        |  49 ++
 linux-user/loongarch64/target_syscall.h        |  46 ++
 linux-user/loongarch64/termbits.h              |   1 +
 linux-user/syscall_defs.h                      |  10 +-
 meson.build                                    |   3 +-
 scripts/gensyscalls.sh                         |   1 +
 scripts/qemu-binfmt-conf.sh                    |   6 +-
 target/loongarch/README                        |  76 ++
 target/loongarch/cpu-param.h                   |  19 +
 target/loongarch/cpu.c                         | 353 ++++++++++
 target/loongarch/cpu.h                         | 254 +++++++
 target/loongarch/disas.c                       | 919 +++++++++++++++++++++++++
 target/loongarch/fpu_helper.c                  | 865 +++++++++++++++++++++++
 target/loongarch/helper.h                      |  97 +++
 target/loongarch/insn_trans/trans_arith.c      | 322 +++++++++
 target/loongarch/insn_trans/trans_atomic.c     | 133 ++++
 target/loongarch/insn_trans/trans_bit.c        | 255 +++++++
 target/loongarch/insn_trans/trans_branch.c     |  85 +++
 target/loongarch/insn_trans/trans_extra.c      |  87 +++
 target/loongarch/insn_trans/trans_farith.c     | 108 +++
 target/loongarch/insn_trans/trans_fcmp.c       |  59 ++
 target/loongarch/insn_trans/trans_fcnv.c       |  36 +
 target/loongarch/insn_trans/trans_fmemory.c    | 187 +++++
 target/loongarch/insn_trans/trans_fmov.c       | 153 ++++
 target/loongarch/insn_trans/trans_memory.c     | 235 +++++++
 target/loongarch/insn_trans/trans_shift.c      | 131 ++++
 target/loongarch/insns.decode                  | 480 +++++++++++++
 target/loongarch/internals.h                   |  29 +
 target/loongarch/meson.build                   |  19 +
 target/loongarch/op_helper.c                   |  85 +++
 target/loongarch/translate.c                   | 288 ++++++++
 target/loongarch/translate.h                   |  46 ++
 target/meson.build                             |   1 +
 tests/tcg/configure.sh                         |   1 +
 52 files changed, 6367 insertions(+), 6 deletions(-)
 create mode 100644 configs/targets/loongarch64-linux-user.mak
 create mode 100644 linux-user/host/loongarch64/hostdep.h
 create mode 100644 linux-user/host/loongarch64/safe-syscall.inc.S
 create mode 100644 linux-user/loongarch64/cpu_loop.c
 create mode 100644 linux-user/loongarch64/signal.c
 create mode 100644 linux-user/loongarch64/sockbits.h
 create mode 100644 linux-user/loongarch64/syscall_nr.h
 create mode 100644 linux-user/loongarch64/target_cpu.h
 create mode 100644 linux-user/loongarch64/target_elf.h
 create mode 100644 linux-user/loongarch64/target_errno_defs.h
 create mode 100644 linux-user/loongarch64/target_fcntl.h
 create mode 100644 linux-user/loongarch64/target_signal.h
 create mode 100644 linux-user/loongarch64/target_structs.h
 create mode 100644 linux-user/loongarch64/target_syscall.h
 create mode 100644 linux-user/loongarch64/termbits.h
 create mode 100644 target/loongarch/README
 create mode 100644 target/loongarch/cpu-param.h
 create mode 100644 target/loongarch/cpu.c
 create mode 100644 target/loongarch/cpu.h
 create mode 100644 target/loongarch/disas.c
 create mode 100644 target/loongarch/fpu_helper.c
 create mode 100644 target/loongarch/helper.h
 create mode 100644 target/loongarch/insn_trans/trans_arith.c
 create mode 100644 target/loongarch/insn_trans/trans_atomic.c
 create mode 100644 target/loongarch/insn_trans/trans_bit.c
 create mode 100644 target/loongarch/insn_trans/trans_branch.c
 create mode 100644 target/loongarch/insn_trans/trans_extra.c
 create mode 100644 target/loongarch/insn_trans/trans_farith.c
 create mode 100644 target/loongarch/insn_trans/trans_fcmp.c
 create mode 100644 target/loongarch/insn_trans/trans_fcnv.c
 create mode 100644 target/loongarch/insn_trans/trans_fmemory.c
 create mode 100644 target/loongarch/insn_trans/trans_fmov.c
 create mode 100644 target/loongarch/insn_trans/trans_memory.c
 create mode 100644 target/loongarch/insn_trans/trans_shift.c
 create mode 100644 target/loongarch/insns.decode
 create mode 100644 target/loongarch/internals.h
 create mode 100644 target/loongarch/meson.build
 create mode 100644 target/loongarch/op_helper.c
 create mode 100644 target/loongarch/translate.c
 create mode 100644 target/loongarch/translate.h

-- 
1.8.3.1




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