[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 02/34] target/ppc: move resolve_PLS_D to translate.c
From: |
matheus . ferst |
Subject: |
[PATCH v2 02/34] target/ppc: move resolve_PLS_D to translate.c |
Date: |
Fri, 29 Oct 2021 17:23:52 -0300 |
From: Fernando Eckhardt Valle <phervalle@gmail.com>
Move resolve_PLS_D from fixedpoint-impl.c.inc to translate.c
because this way the function can be used not only by fixed
point instructions.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Fernando Eckhardt Valle <phervalle@gmail.com>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
target/ppc/translate.c | 19 +++++++++++++++++++
target/ppc/translate/fixedpoint-impl.c.inc | 19 -------------------
2 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index cc809341e4..4828456d34 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -7523,6 +7523,25 @@ static int times_4(DisasContext *ctx, int x)
#include "decode-insn64.c.inc"
#include "power8-pmu-regs.c.inc"
+/*
+ * Incorporate CIA into the constant when R=1.
+ * Validate that when R=1, RA=0.
+ */
+static bool resolve_PLS_D(DisasContext *ctx, arg_D *d, arg_PLS_D *a)
+{
+ d->rt = a->rt;
+ d->ra = a->ra;
+ d->si = a->si;
+ if (a->r) {
+ if (unlikely(a->ra != 0)) {
+ gen_invalid(ctx);
+ return false;
+ }
+ d->si += ctx->cia;
+ }
+ return true;
+}
+
#include "translate/fixedpoint-impl.c.inc"
#include "translate/fp-impl.c.inc"
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc
b/target/ppc/translate/fixedpoint-impl.c.inc
index caef5d89cd..812b7ddd0a 100644
--- a/target/ppc/translate/fixedpoint-impl.c.inc
+++ b/target/ppc/translate/fixedpoint-impl.c.inc
@@ -17,25 +17,6 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-/*
- * Incorporate CIA into the constant when R=1.
- * Validate that when R=1, RA=0.
- */
-static bool resolve_PLS_D(DisasContext *ctx, arg_D *d, arg_PLS_D *a)
-{
- d->rt = a->rt;
- d->ra = a->ra;
- d->si = a->si;
- if (a->r) {
- if (unlikely(a->ra != 0)) {
- gen_invalid(ctx);
- return false;
- }
- d->si += ctx->cia;
- }
- return true;
-}
-
/*
* Fixed-Point Load/Store Instructions
*/
--
2.25.1
- [PATCH v2 00/34] PowerISA v3.1 instruction batch, matheus . ferst, 2021/10/29
- [PATCH v2 01/34] target/ppc: introduce do_ea_calc, matheus . ferst, 2021/10/29
- [PATCH v2 03/34] target/ppc: Move load and store floating point instructions to decodetree, matheus . ferst, 2021/10/29
- [PATCH v2 05/34] target/ppc: Move LQ and STQ to decodetree, matheus . ferst, 2021/10/29
- [PATCH v2 06/34] target/ppc: Implement PLQ and PSTQ, matheus . ferst, 2021/10/29
- [PATCH v2 02/34] target/ppc: move resolve_PLS_D to translate.c,
matheus . ferst <=
- [PATCH v2 04/34] target/ppc: Implement PLFS, PLFD, PSTFS and PSTFD instructions, matheus . ferst, 2021/10/29
- [PATCH v2 07/34] target/ppc: Implement cntlzdm, matheus . ferst, 2021/10/29
- [PATCH v2 08/34] target/ppc: Implement cnttzdm, matheus . ferst, 2021/10/29
- [PATCH v2 09/34] target/ppc: Implement pdepd instruction, matheus . ferst, 2021/10/29
- [PATCH v2 10/34] target/ppc: Implement pextd instruction, matheus . ferst, 2021/10/29
- [PATCH v2 11/34] target/ppc: Move vcfuged to vmx-impl.c.inc, matheus . ferst, 2021/10/29