[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v9 46/76] target/riscv: rvv-1.0: single-width saturating add and
|
From: |
frank . chang |
|
Subject: |
[PATCH v9 46/76] target/riscv: rvv-1.0: single-width saturating add and subtract instructions |
|
Date: |
Fri, 29 Oct 2021 16:58:51 +0800 |
From: Frank Chang <frank.chang@sifive.com>
Sign-extend vsaddu.vi immediate value.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/riscv/insn_trans/trans_rvv.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc
b/target/riscv/insn_trans/trans_rvv.c.inc
index f6202835ff4..ed4554b6a1d 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -1999,7 +1999,7 @@ GEN_OPIVX_TRANS(vsaddu_vx, opivx_check)
GEN_OPIVX_TRANS(vsadd_vx, opivx_check)
GEN_OPIVX_TRANS(vssubu_vx, opivx_check)
GEN_OPIVX_TRANS(vssub_vx, opivx_check)
-GEN_OPIVI_TRANS(vsaddu_vi, IMM_ZX, vsaddu_vx, opivx_check)
+GEN_OPIVI_TRANS(vsaddu_vi, IMM_SX, vsaddu_vx, opivx_check)
GEN_OPIVI_TRANS(vsadd_vi, IMM_SX, vsadd_vx, opivx_check)
/* Vector Single-Width Averaging Add and Subtract */
--
2.25.1
- [PATCH v9 26/76] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation, (continued)
- [PATCH v9 26/76] target/riscv: rvv-1.0: take fractional LMUL into vector max elements calculation, frank . chang, 2021/10/29
- [PATCH v9 28/76] target/riscv: rvv-1.0: floating-point classify instructions, frank . chang, 2021/10/29
- [PATCH v9 30/76] target/riscv: rvv-1.0: find-first-set mask bit instruction, frank . chang, 2021/10/29
- [PATCH v9 31/76] target/riscv: rvv-1.0: set-X-first mask bit instructions, frank . chang, 2021/10/29
- [PATCH v9 38/76] target/riscv: rvv-1.0: floating-point scalar move instructions, frank . chang, 2021/10/29
- [PATCH v9 40/76] target/riscv: rvv-1.0: integer extension instructions, frank . chang, 2021/10/29
- [PATCH v9 41/76] target/riscv: rvv-1.0: single-width averaging add and subtract instructions, frank . chang, 2021/10/29
- [PATCH v9 39/76] target/riscv: rvv-1.0: whole register move instructions, frank . chang, 2021/10/29
- [PATCH v9 42/76] target/riscv: rvv-1.0: single-width bit shift instructions, frank . chang, 2021/10/29
- [PATCH v9 44/76] target/riscv: rvv-1.0: narrowing integer right shift instructions, frank . chang, 2021/10/29
- [PATCH v9 46/76] target/riscv: rvv-1.0: single-width saturating add and subtract instructions,
frank . chang <=
- [PATCH v9 43/76] target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow, frank . chang, 2021/10/29
- [PATCH v9 45/76] target/riscv: rvv-1.0: widening integer multiply-add instructions, frank . chang, 2021/10/29
- [PATCH v9 47/76] target/riscv: rvv-1.0: integer comparison instructions, frank . chang, 2021/10/29
- [PATCH v9 48/76] target/riscv: rvv-1.0: floating-point compare instructions, frank . chang, 2021/10/29
- [PATCH v9 49/76] target/riscv: rvv-1.0: mask-register logical instructions, frank . chang, 2021/10/29
- [PATCH v9 50/76] target/riscv: rvv-1.0: slide instructions, frank . chang, 2021/10/29
- [PATCH v9 52/76] target/riscv: rvv-1.0: narrowing fixed-point clip instructions, frank . chang, 2021/10/29
- [PATCH v9 51/76] target/riscv: rvv-1.0: floating-point slide instructions, frank . chang, 2021/10/29
- [PATCH v9 53/76] target/riscv: rvv-1.0: single-width floating-point reduction, frank . chang, 2021/10/29
- [PATCH v9 54/76] target/riscv: rvv-1.0: widening floating-point reduction instructions, frank . chang, 2021/10/29