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[PATCH v8 3/8] hw/arm/virt: Add cpu-map to device tree
From: |
Yanan Wang |
Subject: |
[PATCH v8 3/8] hw/arm/virt: Add cpu-map to device tree |
Date: |
Thu, 14 Oct 2021 21:22:01 +0800 |
From: Andrew Jones <drjones@redhat.com>
Support device tree CPU topology descriptions.
In accordance with the Devicetree Specification, the Linux Doc
"arm/cpus.yaml" requires that cpus and cpu nodes in the DT are
present. And we have already met the requirement by generating
/cpus/cpu@* nodes for members within ms->smp.cpus. Accordingly,
we should also create subnodes in cpu-map for the present cpus,
each of which relates to an unique cpu node.
The Linux Doc "cpu/cpu-topology.txt" states that the hierarchy
of CPUs in a SMP system is defined through four entities and
they are socket/cluster/core/thread. It is also required that
a socket node's child nodes must be one or more cluster nodes.
Given that currently we are only provided with information of
socket/core/thread, we assume there is one cluster child node
in each socket node when creating cpu-map.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Co-developed-by: Yanan Wang <wangyanan55@huawei.com>
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
---
hw/arm/virt.c | 70 +++++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 60 insertions(+), 10 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index d241516523..f80af19cd3 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -351,20 +351,21 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms)
int cpu;
int addr_cells = 1;
const MachineState *ms = MACHINE(vms);
+ const VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
int smp_cpus = ms->smp.cpus;
/*
- * From Documentation/devicetree/bindings/arm/cpus.txt
- * On ARM v8 64-bit systems value should be set to 2,
- * that corresponds to the MPIDR_EL1 register size.
- * If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
- * in the system, #address-cells can be set to 1, since
- * MPIDR_EL1[63:32] bits are not used for CPUs
- * identification.
+ * See Linux Documentation/devicetree/bindings/arm/cpus.yaml
+ * On ARM v8 64-bit systems value should be set to 2,
+ * that corresponds to the MPIDR_EL1 register size.
+ * If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
+ * in the system, #address-cells can be set to 1, since
+ * MPIDR_EL1[63:32] bits are not used for CPUs
+ * identification.
*
- * Here we actually don't know whether our system is 32- or 64-bit one.
- * The simplest way to go is to examine affinity IDs of all our CPUs. If
- * at least one of them has Aff3 populated, we set #address-cells to 2.
+ * Here we actually don't know whether our system is 32- or 64-bit one.
+ * The simplest way to go is to examine affinity IDs of all our CPUs. If
+ * at least one of them has Aff3 populated, we set #address-cells to 2.
*/
for (cpu = 0; cpu < smp_cpus; cpu++) {
ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu));
@@ -407,8 +408,57 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms)
ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
}
+ if (!vmc->no_cpu_topology) {
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle",
+ qemu_fdt_alloc_phandle(ms->fdt));
+ }
+
g_free(nodename);
}
+
+ if (!vmc->no_cpu_topology) {
+ /*
+ * Add vCPU topology description through fdt node cpu-map.
+ *
+ * See Linux Documentation/devicetree/bindings/cpu/cpu-topology.txt
+ * In a SMP system, the hierarchy of CPUs can be defined through
+ * four entities that are used to describe the layout of CPUs in
+ * the system: socket/cluster/core/thread.
+ *
+ * A socket node represents the boundary of system physical package
+ * and its child nodes must be one or more cluster nodes. A system
+ * can contain several layers of clustering within a single physical
+ * package and cluster nodes can be contained in parent cluster nodes.
+ *
+ * Given that cluster is not yet supported in the vCPU topology,
+ * we currently generate one cluster node within each socket node
+ * by default.
+ */
+ qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map");
+
+ for (cpu = smp_cpus - 1; cpu >= 0; cpu--) {
+ char *cpu_path = g_strdup_printf("/cpus/cpu@%d", cpu);
+ char *map_path;
+
+ if (ms->smp.threads > 1) {
+ map_path = g_strdup_printf(
+ "/cpus/cpu-map/socket%d/cluster0/core%d/thread%d",
+ cpu / (ms->smp.cores * ms->smp.threads),
+ (cpu / ms->smp.threads) % ms->smp.cores,
+ cpu % ms->smp.threads);
+ } else {
+ map_path = g_strdup_printf(
+ "/cpus/cpu-map/socket%d/cluster0/core%d",
+ cpu / ms->smp.cores,
+ cpu % ms->smp.cores);
+ }
+ qemu_fdt_add_path(ms->fdt, map_path);
+ qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path);
+
+ g_free(map_path);
+ g_free(cpu_path);
+ }
+ }
}
static void fdt_add_its_gic_node(VirtMachineState *vms)
--
2.19.1
- Re: [PATCH v8 4/8] hw/acpi/aml-build: Add Processor hierarchy node structure, (continued)
- [PATCH v8 5/8] hw/acpi/aml-build: Add PPTT table, Yanan Wang, 2021/10/14
- Re: [PATCH v8 5/8] hw/acpi/aml-build: Add PPTT table, Eric Auger, 2021/10/20
- Re: [PATCH v8 5/8] hw/acpi/aml-build: Add PPTT table, wangyanan (Y), 2021/10/20
- Re: [PATCH v8 5/8] hw/acpi/aml-build: Add PPTT table, Eric Auger, 2021/10/20
- Re: [PATCH v8 5/8] hw/acpi/aml-build: Add PPTT table, wangyanan (Y), 2021/10/20
- Re: [PATCH v8 5/8] hw/acpi/aml-build: Add PPTT table, Eric Auger, 2021/10/20
- Re: [PATCH v8 5/8] hw/acpi/aml-build: Add PPTT table, wangyanan (Y), 2021/10/20
- Re: [PATCH v8 5/8] hw/acpi/aml-build: Add PPTT table, Andrew Jones, 2021/10/21
- Re: [PATCH v8 5/8] hw/acpi/aml-build: Add PPTT table, wangyanan (Y), 2021/10/21
[PATCH v8 3/8] hw/arm/virt: Add cpu-map to device tree,
Yanan Wang <=
[PATCH v8 1/8] hw/arm/virt: Only describe cpu topology since virt-6.2, Yanan Wang, 2021/10/14
[PATCH v8 8/8] tests/data/acpi/virt: Update the empty expected file for PPTT, Yanan Wang, 2021/10/14
Re: [PATCH v8 0/8] hw/arm/virt: Introduce cpu topology support, wangyanan (Y), 2021/10/19