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[PATCH v7 17/40] target/arm: Restrict has_work() handler to sysemu and T
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v7 17/40] target/arm: Restrict has_work() handler to sysemu and TCG |
Date: |
Sat, 25 Sep 2021 16:50:55 +0200 |
Restrict arm_cpu_has_work() and has_work() handler to TCG sysemu.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/arm/internals.h | 4 +++-
target/arm/cpu.c | 7 +++++--
target/arm/cpu_tcg.c | 2 +-
3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index f20aeb97fa0..18b3c2bf1ea 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -175,9 +175,11 @@ void arm_translate_init(void);
#ifdef CONFIG_TCG
void arm_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
-#endif /* CONFIG_TCG */
+#if !defined(CONFIG_USER_ONLY)
bool arm_cpu_has_work(CPUState *cs);
+#endif /* !CONFIG_USER_ONLY */
+#endif /* CONFIG_TCG */
/**
* aarch64_sve_zcr_get_valid_len:
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 4b08f717f64..53c478171ac 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -74,8 +74,8 @@ void arm_cpu_synchronize_from_tb(CPUState *cs,
env->regs[15] = tb->pc;
}
}
-#endif /* CONFIG_TCG */
+#ifndef CONFIG_USER_ONLY
bool arm_cpu_has_work(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
@@ -86,6 +86,9 @@ bool arm_cpu_has_work(CPUState *cs)
| CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ
| CPU_INTERRUPT_EXITTB);
}
+#endif /* !CONFIG_USER_ONLY */
+
+#endif /* CONFIG_TCG */
void arm_register_pre_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
void *opaque)
@@ -2035,6 +2038,7 @@ static const struct TCGCPUOps arm_tcg_ops = {
.debug_excp_handler = arm_debug_excp_handler,
#if !defined(CONFIG_USER_ONLY)
+ .has_work = arm_cpu_has_work,
.cpu_exec_interrupt = arm_cpu_exec_interrupt,
.do_interrupt = arm_cpu_do_interrupt,
.do_transaction_failed = arm_cpu_do_transaction_failed,
@@ -2059,7 +2063,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void
*data)
device_class_set_parent_reset(dc, arm_cpu_reset, &acc->parent_reset);
cc->class_by_name = arm_cpu_class_by_name;
- cc->has_work = arm_cpu_has_work;
cc->dump_state = arm_cpu_dump_state;
cc->set_pc = arm_cpu_set_pc;
cc->gdb_read_register = arm_cpu_gdb_read_register;
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
index 9a0927ad5d0..7d0d9fcbc79 100644
--- a/target/arm/cpu_tcg.c
+++ b/target/arm/cpu_tcg.c
@@ -902,6 +902,7 @@ static const struct TCGCPUOps arm_v7m_tcg_ops = {
.debug_excp_handler = arm_debug_excp_handler,
#if !defined(CONFIG_USER_ONLY)
+ .has_work = arm_cpu_has_work,
.cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt,
.do_interrupt = arm_v7m_cpu_do_interrupt,
.do_transaction_failed = arm_cpu_do_transaction_failed,
@@ -920,7 +921,6 @@ static void arm_v7m_class_init(ObjectClass *oc, void *data)
acc->info = data;
#ifdef CONFIG_TCG
- cc->has_work = arm_cpu_has_work;
cc->tcg_ops = &arm_v7m_tcg_ops;
#endif /* CONFIG_TCG */
--
2.31.1
- [PATCH v7 07/40] accel/whpx: Implement AccelOpsClass::has_work(), (continued)
- [PATCH v7 07/40] accel/whpx: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 08/40] accel/hvf: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 09/40] accel/xen: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 10/40] accel/hax: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 11/40] accel/nvmm: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 12/40] accel/qtest: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 13/40] accel/tcg: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 14/40] accel: Simplify cpu_has_work(), Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 15/40] accel/tcg: Introduce TCGCPUOps::has_work(), Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 16/40] target/arm: Explicit v7M cores use arm_cpu_has_work as CPUClass:has_work, Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 17/40] target/arm: Restrict has_work() handler to sysemu and TCG,
Philippe Mathieu-Daudé <=
- [PATCH v7 18/40] target/alpha: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 19/40] target/avr: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 20/40] target/cris: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 21/40] target/hexagon: Remove unused has_work() handler, Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 22/40] target/hppa: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 23/40] target/i386: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 24/40] target/m68k: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 25/40] target/microblaze: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 26/40] target/mips: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/25
- [PATCH v7 27/40] target/nios2: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/25