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[PATCH v6 20/40] target/cris: Restrict has_work() handler to sysemu
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v6 20/40] target/cris: Restrict has_work() handler to sysemu |
Date: |
Fri, 24 Sep 2021 11:38:27 +0200 |
Restrict has_work() to sysemu.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/cris/cpu.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index c2e7483f5bd..b2761f8b110 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -35,10 +35,12 @@ static void cris_cpu_set_pc(CPUState *cs, vaddr value)
cpu->env.pc = value;
}
+#if !defined(CONFIG_USER_ONLY)
static bool cris_cpu_has_work(CPUState *cs)
{
return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
}
+#endif /* !CONFIG_USER_ONLY */
static void cris_cpu_reset(DeviceState *dev)
{
@@ -208,6 +210,7 @@ static const struct TCGCPUOps crisv10_tcg_ops = {
.tlb_fill = cris_cpu_tlb_fill,
#ifndef CONFIG_USER_ONLY
+ .has_work = cris_cpu_has_work,
.cpu_exec_interrupt = cris_cpu_exec_interrupt,
.do_interrupt = crisv10_cpu_do_interrupt,
#endif /* !CONFIG_USER_ONLY */
@@ -218,6 +221,7 @@ static const struct TCGCPUOps crisv32_tcg_ops = {
.tlb_fill = cris_cpu_tlb_fill,
#ifndef CONFIG_USER_ONLY
+ .has_work = cris_cpu_has_work,
.cpu_exec_interrupt = cris_cpu_exec_interrupt,
.do_interrupt = cris_cpu_do_interrupt,
#endif /* !CONFIG_USER_ONLY */
@@ -294,7 +298,6 @@ static void cris_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_reset(dc, cris_cpu_reset, &ccc->parent_reset);
cc->class_by_name = cris_cpu_class_by_name;
- cc->has_work = cris_cpu_has_work;
cc->dump_state = cris_cpu_dump_state;
cc->set_pc = cris_cpu_set_pc;
cc->gdb_read_register = cris_cpu_gdb_read_register;
--
2.31.1
- [PATCH v6 13/40] accel/qtest: Implement AccelOpsClass::has_work(), (continued)
- [PATCH v6 13/40] accel/qtest: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 14/40] accel/tcg: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 15/40] accel: Simplify cpu_has_work(), Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 16/40] accel/tcg: Introduce TCGCPUOps::has_work(), Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 17/40] target/arm: Explicit v7M cores use arm_cpu_has_work as CPUClass:has_work, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 18/40] target/arm: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 19/40] target/avr: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 21/40] target/hexagon: Remove unused has_work() handler, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 20/40] target/cris: Restrict has_work() handler to sysemu,
Philippe Mathieu-Daudé <=
- [PATCH v6 22/40] target/hppa: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 23/40] target/i386: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 24/40] target/m68k: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 25/40] target/microblaze: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 26/40] target/mips: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 27/40] target/nios2: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 28/40] target/openrisc: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 30/40] target/ppc: Restrict has_work() handlers to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 32/40] target/rx: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/24
- [PATCH v6 31/40] target/riscv: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/24