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[PATCH v2 14/30] tcg/loongarch64: Implement bswap32_i32/bswap32_i64/bswa
From: |
WANG Xuerui |
Subject: |
[PATCH v2 14/30] tcg/loongarch64: Implement bswap32_i32/bswap32_i64/bswap64_i64 |
Date: |
Wed, 22 Sep 2021 04:18:59 +0800 |
Signed-off-by: WANG Xuerui <git@xen0n.name>
---
tcg/loongarch64/tcg-target.c.inc | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 27066960cf..e7b5f2c5ab 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -508,6 +508,23 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_opc_bstrins_d(s, a0, a2, args[3], args[3] + args[4] - 1);
break;
+ case INDEX_op_bswap32_i32:
+ /* All 32-bit values are computed sign-extended in the register. */
+ a2 = TCG_BSWAP_OS;
+ /* fallthrough */
+ case INDEX_op_bswap32_i64:
+ tcg_out_opc_revb_2w(s, a0, a1);
+ if (a2 & TCG_BSWAP_OS) {
+ tcg_out_ext32s(s, a0, a0);
+ } else if ((a2 & (TCG_BSWAP_IZ | TCG_BSWAP_OZ)) == TCG_BSWAP_OZ) {
+ tcg_out_ext32u(s, a0, a0);
+ }
+ break;
+
+ case INDEX_op_bswap64_i64:
+ tcg_out_opc_revb_d(s, a0, a1);
+ break;
+
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
default:
@@ -539,6 +556,9 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
case INDEX_op_not_i64:
case INDEX_op_extract_i32:
case INDEX_op_extract_i64:
+ case INDEX_op_bswap32_i32:
+ case INDEX_op_bswap32_i64:
+ case INDEX_op_bswap64_i64:
return C_O1_I1(r, r);
case INDEX_op_andc_i32:
--
2.33.0
- [PATCH v2 05/30] tcg/loongarch64: Add register names, allocation order and input/output sets, (continued)
- [PATCH v2 05/30] tcg/loongarch64: Add register names, allocation order and input/output sets, WANG Xuerui, 2021/09/21
- [PATCH v2 10/30] tcg/loongarch64: Implement goto_ptr, WANG Xuerui, 2021/09/21
- [PATCH v2 12/30] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc/eqv ops, WANG Xuerui, 2021/09/21
- [PATCH v2 11/30] tcg/loongarch64: Implement sign-/zero-extension ops, WANG Xuerui, 2021/09/21
- [PATCH v2 13/30] tcg/loongarch64: Implement deposit/extract ops, WANG Xuerui, 2021/09/21
- [PATCH v2 15/30] tcg/loongarch64: Implement clz/ctz ops, WANG Xuerui, 2021/09/21
- [PATCH v2 18/30] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops, WANG Xuerui, 2021/09/21
- [PATCH v2 14/30] tcg/loongarch64: Implement bswap32_i32/bswap32_i64/bswap64_i64,
WANG Xuerui <=
- [PATCH v2 17/30] tcg/loongarch64: Implement add/sub ops, WANG Xuerui, 2021/09/21
- [PATCH v2 21/30] tcg/loongarch64: Implement tcg_out_call, WANG Xuerui, 2021/09/21
- [PATCH v2 22/30] tcg/loongarch64: Implement simple load/store ops, WANG Xuerui, 2021/09/21
- [PATCH v2 19/30] tcg/loongarch64: Implement br/brcond ops, WANG Xuerui, 2021/09/21
- [PATCH v2 24/30] tcg/loongarch64: Implement tcg_target_qemu_prologue, WANG Xuerui, 2021/09/21
- [PATCH v2 23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops, WANG Xuerui, 2021/09/21