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[PULL 22/27] target/arm: Optimize MVE VDUP
From: |
Peter Maydell |
Subject: |
[PULL 22/27] target/arm: Optimize MVE VDUP |
Date: |
Mon, 20 Sep 2021 15:19:42 +0100 |
Optimize the MVE VDUP insns by using TCG vector ops when possible.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210913095440.13462-8-peter.maydell@linaro.org
---
target/arm/translate-mve.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c
index d30c7e57ea3..13de55242e2 100644
--- a/target/arm/translate-mve.c
+++ b/target/arm/translate-mve.c
@@ -500,11 +500,15 @@ static bool trans_VDUP(DisasContext *s, arg_VDUP *a)
return true;
}
- qd = mve_qreg_ptr(a->qd);
rt = load_reg(s, a->rt);
- tcg_gen_dup_i32(a->size, rt, rt);
- gen_helper_mve_vdup(cpu_env, qd, rt);
- tcg_temp_free_ptr(qd);
+ if (mve_no_predication(s)) {
+ tcg_gen_gvec_dup_i32(a->size, mve_qreg_offset(a->qd), 16, 16, rt);
+ } else {
+ qd = mve_qreg_ptr(a->qd);
+ tcg_gen_dup_i32(a->size, rt, rt);
+ gen_helper_mve_vdup(cpu_env, qd, rt);
+ tcg_temp_free_ptr(qd);
+ }
tcg_temp_free_i32(rt);
mve_update_eci(s);
return true;
--
2.20.1
- [PULL 11/27] arm/hvf: Add a WFI handler, (continued)
- [PULL 11/27] arm/hvf: Add a WFI handler, Peter Maydell, 2021/09/20
- [PULL 13/27] hvf: arm: Implement PSCI handling, Peter Maydell, 2021/09/20
- [PULL 15/27] hvf: arm: Add rudimentary PMC support, Peter Maydell, 2021/09/20
- [PULL 20/27] target/arm: Optimize MVE arithmetic ops, Peter Maydell, 2021/09/20
- [PULL 21/27] target/arm: Optimize MVE VNEG, VABS, Peter Maydell, 2021/09/20
- [PULL 24/27] target/arm: Optimize MVE VSHL, VSHR immediate forms, Peter Maydell, 2021/09/20
- [PULL 16/27] target/arm: Avoid goto_tb if we're trying to exit to the main loop, Peter Maydell, 2021/09/20
- [PULL 26/27] target/arm: Optimize MVE VSLI and VSRI, Peter Maydell, 2021/09/20
- [PULL 19/27] target/arm: Optimize MVE logic ops, Peter Maydell, 2021/09/20
- [PULL 17/27] target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migration, Peter Maydell, 2021/09/20
- [PULL 22/27] target/arm: Optimize MVE VDUP,
Peter Maydell <=
- [PULL 25/27] target/arm: Optimize MVE VSHLL and VMOVL, Peter Maydell, 2021/09/20
- [PULL 02/27] elf2dmp: Fail cleanly if PDB file specifies zero block_size, Peter Maydell, 2021/09/20
- [PULL 14/27] arm: Add Hypervisor.framework build target, Peter Maydell, 2021/09/20
- [PULL 18/27] target/arm: Add TB flag for "MVE insns not predicated", Peter Maydell, 2021/09/20
- [PULL 27/27] target/arm: Optimize MVE 1op-immediate insns, Peter Maydell, 2021/09/20
- [PULL 23/27] target/arm: Optimize MVE VMVN, Peter Maydell, 2021/09/20