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[PULL 20/35] target/openrisc: Restrict has_work() handler to sysemu
From: |
Richard Henderson |
Subject: |
[PULL 20/35] target/openrisc: Restrict has_work() handler to sysemu |
Date: |
Thu, 16 Sep 2021 08:30:10 -0700 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Restrict has_work() to sysemu.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210912172731.789788-20-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/openrisc/cpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 27cb04152f..3c368a1bde 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -30,11 +30,13 @@ static void openrisc_cpu_set_pc(CPUState *cs, vaddr value)
cpu->env.dflag = 0;
}
+#if !defined(CONFIG_USER_ONLY)
static bool openrisc_cpu_has_work(CPUState *cs)
{
return cs->interrupt_request & (CPU_INTERRUPT_HARD |
CPU_INTERRUPT_TIMER);
}
+#endif /* !CONFIG_USER_ONLY */
static void openrisc_disas_set_info(CPUState *cpu, disassemble_info *info)
{
@@ -189,6 +191,7 @@ static const struct TCGCPUOps openrisc_tcg_ops = {
.tlb_fill = openrisc_cpu_tlb_fill,
#ifndef CONFIG_USER_ONLY
+ .has_work = openrisc_cpu_has_work,
.cpu_exec_interrupt = openrisc_cpu_exec_interrupt,
.do_interrupt = openrisc_cpu_do_interrupt,
#endif /* !CONFIG_USER_ONLY */
@@ -205,7 +208,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void
*data)
device_class_set_parent_reset(dc, openrisc_cpu_reset, &occ->parent_reset);
cc->class_by_name = openrisc_cpu_class_by_name;
- cc->has_work = openrisc_cpu_has_work;
cc->dump_state = openrisc_cpu_dump_state;
cc->set_pc = openrisc_cpu_set_pc;
cc->gdb_read_register = openrisc_cpu_gdb_read_register;
--
2.25.1
- [PULL 21/35] target/ppc: Introduce PowerPCCPUClass::has_work(), (continued)
- [PULL 21/35] target/ppc: Introduce PowerPCCPUClass::has_work(), Richard Henderson, 2021/09/16
- [PULL 24/35] target/rx: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 28/35] target/sparc: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 27/35] target/sparc: Remove pointless use of CONFIG_TCG definition, Richard Henderson, 2021/09/16
- [PULL 33/35] tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr, Richard Henderson, 2021/09/16
- [PULL 35/35] tcg/mips: Drop special alignment for code_gen_buffer, Richard Henderson, 2021/09/16
- [PULL 31/35] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one, Richard Henderson, 2021/09/16
- [PULL 18/35] target/mips: Restrict has_work() handler to sysemu and TCG, Richard Henderson, 2021/09/16
- [PULL 25/35] target/s390x: Restrict has_work() handler to sysemu and TCG, Richard Henderson, 2021/09/16
- [PULL 32/35] tcg/mips: Drop inline markers, Richard Henderson, 2021/09/16
- [PULL 20/35] target/openrisc: Restrict has_work() handler to sysemu,
Richard Henderson <=
- [PULL 26/35] target/sh4: Restrict has_work() handler to sysemu, Richard Henderson, 2021/09/16
- [PULL 34/35] tcg/mips: Unset TCG_TARGET_HAS_direct_jump, Richard Henderson, 2021/09/16
- Re: [PULL 00/35] tcg patch queue, Peter Maydell, 2021/09/20
- Re: [PULL 00/35] tcg patch queue, Philippe Mathieu-Daudé, 2021/09/20
- Re: [PULL 00/35] tcg patch queue, Philippe Mathieu-Daudé, 2021/09/20
- Re: [PULL 00/35] tcg patch queue, Philippe Mathieu-Daudé, 2021/09/20
- Re: [PULL 00/35] tcg patch queue, Philippe Mathieu-Daudé, 2021/09/20
- Re: [PULL 00/35] tcg patch queue, Peter Maydell, 2021/09/21
- Re: [PULL 00/35] tcg patch queue, Philippe Mathieu-Daudé, 2021/09/21
- Re: [PULL 00/35] tcg patch queue, Peter Maydell, 2021/09/21