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[PATCH v11 12/16] target/riscv: Add a REQUIRE_32BIT macro
From: |
Philipp Tomsich |
Subject: |
[PATCH v11 12/16] target/riscv: Add a REQUIRE_32BIT macro |
Date: |
Sat, 11 Sep 2021 16:00:12 +0200 |
With the changes to Zb[abcs], there's some encodings that are
different in RV64 and RV32 (e.g., for rev8 and zext.h). For these,
we'll need a helper macro allowing us to select on RV32, as well.
Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
(no changes since v3)
Changes in v3:
- Moved the REQUIRE_32BIT macro into a separate commit.
target/riscv/translate.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index e356fc6c46..7562b2f87c 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -337,6 +337,12 @@ EX_SH(12)
} \
} while (0)
+#define REQUIRE_32BIT(ctx) do { \
+ if (!is_32bit(ctx)) { \
+ return false; \
+ } \
+} while (0)
+
#define REQUIRE_64BIT(ctx) do { \
if (is_32bit(ctx)) { \
return false; \
--
2.25.1
- Re: [PATCH v11 03/16] target/riscv: clwz must ignore high bits (use shift-left & changed logic), (continued)
[PATCH v11 09/16] target/riscv: Add instructions of the Zbc-extension, Philipp Tomsich, 2021/09/11
[PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Philipp Tomsich, 2021/09/11
- Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Alistair Francis, 2021/09/28
- Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Philipp Tomsich, 2021/09/28
- Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Richard Henderson, 2021/09/28
- Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Philipp Tomsich, 2021/09/28
- Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Philipp Tomsich, 2021/09/28
[PATCH v11 12/16] target/riscv: Add a REQUIRE_32BIT macro,
Philipp Tomsich <=
[PATCH v11 16/16] disas/riscv: Add Zb[abcs] instructions, Philipp Tomsich, 2021/09/11
[PATCH v11 08/16] target/riscv: Reassign instructions to the Zbs-extension, Philipp Tomsich, 2021/09/11
[PATCH v11 07/16] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B), Philipp Tomsich, 2021/09/11
Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0, Philipp Tomsich, 2021/09/23
Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0, Vineet Gupta, 2021/09/27