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Re: [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci ho
From: |
Ani Sinha |
Subject: |
Re: [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci hotplug |
Date: |
Wed, 8 Sep 2021 10:13:05 +0530 (IST) |
User-agent: |
Alpine 2.22 (DEB 394 2020-01-19) |
On Wed, 8 Sep 2021, Ani Sinha wrote:
> Change caf108bc58790 ("hw/i386/acpi-build: Add ACPI PCI hot-plug methods to
> Q35")
> selects an IO address range for acpi based PCI hotplug for q35 arbitrarily. It
> starts at address 0x0cc4 and ends at 0x0cdb. It was assumed that this address
> range was free and available. However, upon more testing, it seems this
> address
> range to be not available for some latest versions of windows. Hence, this
> change modifies the IO address range so that windows can allocate the address
> range without any conflict. The new address range would start at 0x0dd4 and
> end
> at address 0x0deb.
>
> This change has been tested using a Windows Server 2019 guest VM.
>
I realize that this breaks bios-tables-test.c which I will correct if we
are ok with this fix.
--- /tmp/asl-0FVI90.dsl 2021-09-08 10:05:59.260579343 +0530
+++ /tmp/asl-7TYI90.dsl 2021-09-08 10:05:59.252579221 +0530
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT, Wed Sep 8 10:05:59 2021
+ * Disassembly of /tmp/aml-QVYI90, Wed Sep 8 10:05:59 2021
*
* Original Table Header:
* Signature "DSDT"
* Length 0x00002061 (8289)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math
support
- * Checksum 0xE5
+ * Checksum 0x90
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -226,46 +226,46 @@
Name (_CRS, ResourceTemplate () // _CRS: Current Resource
Settings
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{8}
})
}
}
Scope (_SB.PCI0)
{
- OperationRegion (PCST, SystemIO, 0x0CC4, 0x08)
+ OperationRegion (PCST, SystemIO, 0x0DD4, 0x08)
Field (PCST, DWordAcc, NoLock, WriteAsZeros)
{
PCIU, 32,
PCID, 32
}
- OperationRegion (SEJ, SystemIO, 0x0CCC, 0x04)
+ OperationRegion (SEJ, SystemIO, 0x0DDC, 0x04)
Field (SEJ, DWordAcc, NoLock, WriteAsZeros)
{
B0EJ, 32
}
- OperationRegion (BNMR, SystemIO, 0x0CD4, 0x08)
+ OperationRegion (BNMR, SystemIO, 0x0DE4, 0x08)
Field (BNMR, DWordAcc, NoLock, WriteAsZeros)
{
BNUM, 32,
PIDX, 32
}
Mutex (BLCK, 0x00)
Method (PCEJ, 2, NotSerialized)
{
Acquire (BLCK, 0xFFFF)
BNUM = Arg0
B0EJ = (One << Arg1)
Release (BLCK)
Return (Zero)
}
@@ -3185,34 +3185,34 @@
0x0620, // Range Minimum
0x0620, // Range Maximum
0x01, // Alignment
0x10, // Length
)
})
}
Device (PHPR)
{
Name (_HID, "PNP0A06" /* Generic Container Device */) //
_HID: Hardware ID
Name (_UID, "PCI Hotplug resources") // _UID: Unique ID
Name (_STA, 0x0B) // _STA: Status
Name (_CRS, ResourceTemplate () // _CRS: Current Resource
Settings
{
IO (Decode16,
- 0x0CC4, // Range Minimum
- 0x0CC4, // Range Maximum
+ 0x0DD4, // Range Minimum
+ 0x0DD4, // Range Maximum
0x01, // Alignment
0x18, // Length
)
})
}
}
Scope (\)
{
Name (_S3, Package (0x04) // _S3_: S3 System State
{
One,
One,
Zero,
Zero
})
> Fixes: caf108bc58790 ("hw/i386/acpi-build: Add ACPI PCI hot-plug methods to
> Q35")
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/561
>
> Signed-off-by: Ani Sinha <ani@anisinha.ca>
> ---
> include/hw/acpi/ich9.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
> index a329ce43ab..b68c5a2174 100644
> --- a/include/hw/acpi/ich9.h
> +++ b/include/hw/acpi/ich9.h
> @@ -29,7 +29,7 @@
> #include "hw/acpi/acpi_dev_interface.h"
> #include "hw/acpi/tco.h"
>
> -#define ACPI_PCIHP_ADDR_ICH9 0x0cc4
> +#define ACPI_PCIHP_ADDR_ICH9 0x0dd4
>
> typedef struct ICH9LPCPMRegs {
> /*
> --
> 2.25.1
>
>
- [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci hotplug, Ani Sinha, 2021/09/08
- Re: [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci hotplug,
Ani Sinha <=
- Re: [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci hotplug, Igor Mammedov, 2021/09/08
- Re: [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci hotplug, Ani Sinha, 2021/09/08
- Re: [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci hotplug, Igor Mammedov, 2021/09/08
- Re: [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci hotplug, Ani Sinha, 2021/09/08
- Re: [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci hotplug, Philippe Mathieu-Daudé, 2021/09/08
- Re: [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci hotplug, Igor Mammedov, 2021/09/08
- Re: [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci hotplug, Ani Sinha, 2021/09/08
- Re: [PATCH] hw/i386/acpi-build: adjust q35 IO addr range for acpi pci hotplug, Ani Sinha, 2021/09/13