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[PULL 05/36] target/i386: Added ignore TPR check in ctl_has_irq
From: |
Paolo Bonzini |
Subject: |
[PULL 05/36] target/i386: Added ignore TPR check in ctl_has_irq |
Date: |
Mon, 6 Sep 2021 15:10:28 +0200 |
From: Lara Lazier <laramglazier@gmail.com>
The APM2 states that if V_IGN_TPR is nonzero, the current
virtual interrupt ignores the (virtual) TPR.
Signed-off-by: Lara Lazier <laramglazier@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/sysemu/svm_helper.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/i386/tcg/sysemu/svm_helper.c
b/target/i386/tcg/sysemu/svm_helper.c
index 4612dae1ac..a35b79548a 100644
--- a/target/i386/tcg/sysemu/svm_helper.c
+++ b/target/i386/tcg/sysemu/svm_helper.c
@@ -83,6 +83,11 @@ static inline bool ctl_has_irq(CPUX86State *env)
int_prio = (env->int_ctl & V_INTR_PRIO_MASK) >> V_INTR_PRIO_SHIFT;
tpr = env->int_ctl & V_TPR_MASK;
+
+ if (env->int_ctl & V_IGN_TPR_MASK) {
+ return env->int_ctl & V_IRQ_MASK;
+ }
+
return (env->int_ctl & V_IRQ_MASK) && (int_prio >= tpr);
}
--
2.31.1
- [PULL 00/36] (Mostly) x86 changes for 2021-09-06, Paolo Bonzini, 2021/09/06
- [PULL 01/36] target/i386: VMRUN and VMLOAD canonicalizations, Paolo Bonzini, 2021/09/06
- [PULL 03/36] target/i386: Moved int_ctl into CPUX86State structure, Paolo Bonzini, 2021/09/06
- [PULL 02/36] target/i386: Added VGIF feature, Paolo Bonzini, 2021/09/06
- [PULL 04/36] target/i386: Added VGIF V_IRQ masking capability, Paolo Bonzini, 2021/09/06
- [PULL 05/36] target/i386: Added ignore TPR check in ctl_has_irq,
Paolo Bonzini <=
- [PULL 06/36] target/i386: Added changed priority check for VIRQ, Paolo Bonzini, 2021/09/06
- [PULL 08/36] configure / meson: Move the GBM handling to meson.build, Paolo Bonzini, 2021/09/06
- [PULL 15/36] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX, Paolo Bonzini, 2021/09/06
- [PULL 07/36] target/i386: Added vVMLOAD and vVMSAVE feature, Paolo Bonzini, 2021/09/06
- [PULL 09/36] memory: Add RAM_PROTECTED flag to skip IOMMU mappings, Paolo Bonzini, 2021/09/06
- [PULL 10/36] hostmem: Add hostmem-epc as a backend for SGX EPC, Paolo Bonzini, 2021/09/06
- [PULL 12/36] i386: Add 'sgx-epc' device to expose EPC sections to guest, Paolo Bonzini, 2021/09/06
- [PULL 14/36] i386: Add primary SGX CPUID and MSR defines, Paolo Bonzini, 2021/09/06