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Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine
From: |
Cédric Le Goater |
Subject: |
Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine |
Date: |
Tue, 31 Aug 2021 18:37:24 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
>> I don't think we should initialize all 5 UARTs of SoC and let the user
>> define
>> all the expected devices on the command. Unless we want to do something like
>> 'macs_mask' ? but at the SoC level. It might be overkill for the need.
>
> I'm not sure I'm following what you are suggesting. If we are talking
> about QEMU device initialization, QEMU must initialize all devices
> on the board, regardless the guest code uses them or not.
The console is UART5 by default for all Aspeed boards and the SoC model
choose not to initialize UARTs [1-4] to simplify the command line and
avoid :
-serial null -serial null -serial null -serial null -serial stdio
This new fuji board uses a firmware which enables UART1 for the console.
So we have to change which UART is initialized. The simplest way is
to tell the SoC through a property and change appropriately :
serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400,
serial_hd(0), DEVICE_LITTLE_ENDIAN);
The above is doing the shortcut : serial0 <-> UART5.
Cheers,
C.
- Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine, (continued)
- Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine, Cédric Le Goater, 2021/08/31
- Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine, Andrew Jeffery, 2021/08/31
- Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine, Cédric Le Goater, 2021/08/31
- Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine, Peter Delevoryas, 2021/08/31
- Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine, Philippe Mathieu-Daudé, 2021/08/31
- Re: [PATCH 2/5] hw/arm/aspeed: Select console UART from machine,
Cédric Le Goater <=
[PATCH 5/5] hw/arm/aspeed: Initialize AST2600 clock selection registers, pdel, 2021/08/27
[PATCH 4/5] hw/arm/aspeed: Fix AST2600_CLK_SEL3 address, pdel, 2021/08/27
[PATCH 1/5] hw/arm/aspeed: Add get_irq to AspeedSoCClass, pdel, 2021/08/27