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[PULL 26/28] target/mips: Replace GET_LMASK64() macro by get_lmask(64) f
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 26/28] target/mips: Replace GET_LMASK64() macro by get_lmask(64) function |
Date: |
Wed, 25 Aug 2021 15:02:09 +0200 |
The target endianess information is stored in the BigEndian
bit of the Config0 register in CP0.
Replace the GET_LMASK() macro by an inlined get_lmask() function,
passing CPUMIPSState and the word size as argument.
We can remove another use of the TARGET_WORDS_BIGENDIAN definition.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210818215517.2560994-4-f4bug@amsat.org>
---
target/mips/tcg/ldst_helper.c | 35 ++++++++++++++++-------------------
1 file changed, 16 insertions(+), 19 deletions(-)
diff --git a/target/mips/tcg/ldst_helper.c b/target/mips/tcg/ldst_helper.c
index 054459703aa..d0bd0267b24 100644
--- a/target/mips/tcg/ldst_helper.c
+++ b/target/mips/tcg/ldst_helper.c
@@ -124,50 +124,46 @@ void helper_swr(CPUMIPSState *env, target_ulong arg1,
target_ulong arg2,
* "half" load and stores. We must do the memory access inline,
* or fault handling won't work.
*/
-#ifdef TARGET_WORDS_BIGENDIAN
-#define GET_LMASK64(v) ((v) & 7)
-#else
-#define GET_LMASK64(v) (((v) & 7) ^ 7)
-#endif
void helper_sdl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
int mem_idx)
{
+ target_ulong lmask = get_lmask(env, arg2, 64);
int dir = cpu_is_bigendian(env) ? 1 : -1;
cpu_stb_mmuidx_ra(env, arg2, (uint8_t)(arg1 >> 56), mem_idx, GETPC());
- if (GET_LMASK64(arg2) <= 6) {
+ if (lmask <= 6) {
cpu_stb_mmuidx_ra(env, arg2 + 1 * dir, (uint8_t)(arg1 >> 48),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 5) {
+ if (lmask <= 5) {
cpu_stb_mmuidx_ra(env, arg2 + 2 * dir, (uint8_t)(arg1 >> 40),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 4) {
+ if (lmask <= 4) {
cpu_stb_mmuidx_ra(env, arg2 + 3 * dir, (uint8_t)(arg1 >> 32),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 3) {
+ if (lmask <= 3) {
cpu_stb_mmuidx_ra(env, arg2 + 4 * dir, (uint8_t)(arg1 >> 24),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 2) {
+ if (lmask <= 2) {
cpu_stb_mmuidx_ra(env, arg2 + 5 * dir, (uint8_t)(arg1 >> 16),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 1) {
+ if (lmask <= 1) {
cpu_stb_mmuidx_ra(env, arg2 + 6 * dir, (uint8_t)(arg1 >> 8),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 0) {
+ if (lmask <= 0) {
cpu_stb_mmuidx_ra(env, arg2 + 7 * dir, (uint8_t)arg1,
mem_idx, GETPC());
}
@@ -176,41 +172,42 @@ void helper_sdl(CPUMIPSState *env, target_ulong arg1,
target_ulong arg2,
void helper_sdr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
int mem_idx)
{
+ target_ulong lmask = get_lmask(env, arg2, 64);
int dir = cpu_is_bigendian(env) ? 1 : -1;
cpu_stb_mmuidx_ra(env, arg2, (uint8_t)arg1, mem_idx, GETPC());
- if (GET_LMASK64(arg2) >= 1) {
+ if (lmask >= 1) {
cpu_stb_mmuidx_ra(env, arg2 - 1 * dir, (uint8_t)(arg1 >> 8),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) >= 2) {
+ if (lmask >= 2) {
cpu_stb_mmuidx_ra(env, arg2 - 2 * dir, (uint8_t)(arg1 >> 16),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) >= 3) {
+ if (lmask >= 3) {
cpu_stb_mmuidx_ra(env, arg2 - 3 * dir, (uint8_t)(arg1 >> 24),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) >= 4) {
+ if (lmask >= 4) {
cpu_stb_mmuidx_ra(env, arg2 - 4 * dir, (uint8_t)(arg1 >> 32),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) >= 5) {
+ if (lmask >= 5) {
cpu_stb_mmuidx_ra(env, arg2 - 5 * dir, (uint8_t)(arg1 >> 40),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) >= 6) {
+ if (lmask >= 6) {
cpu_stb_mmuidx_ra(env, arg2 - 6 * dir, (uint8_t)(arg1 >> 48),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) == 7) {
+ if (lmask == 7) {
cpu_stb_mmuidx_ra(env, arg2 - 7 * dir, (uint8_t)(arg1 >> 56),
mem_idx, GETPC());
}
--
2.31.1
- [PULL 16/28] target/mips: Remove gen_helper_0e3i(), (continued)
- [PULL 16/28] target/mips: Remove gen_helper_0e3i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 17/28] target/mips: Remove gen_helper_1e2i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 18/28] target/mips: Use tcg_constant_i32() in gen_helper_0e2i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 19/28] target/mips: Simplify gen_helper() macros by using tcg_constant_i32(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 20/28] target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macros, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 21/28] target/mips: Inline gen_helper_0e0i(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 22/28] target/mips: Use tcg_constant_i32() in generate_exception_err(), Philippe Mathieu-Daudé, 2021/08/25
- [PULL 23/28] target/mips: Define gen_helper() macros in translate.h, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 24/28] target/mips: Call cpu_is_bigendian & inline GET_OFFSET in ld/st helpers, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 25/28] target/mips: Replace GET_LMASK() macro by get_lmask(32) function, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 26/28] target/mips: Replace GET_LMASK64() macro by get_lmask(64) function,
Philippe Mathieu-Daudé <=
- [PULL 27/28] target/mips: Store CP0_Config0 in DisasContext, Philippe Mathieu-Daudé, 2021/08/25
- [PULL 28/28] target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian(), Philippe Mathieu-Daudé, 2021/08/25
- Re: [PULL 00/28] MIPS patches for 2021-08-25, Peter Maydell, 2021/08/26