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Re: [PATCH v2 4/4] target/arm/cpu64: Validate sve vector lengths are sup
From: |
Andrew Jones |
Subject: |
Re: [PATCH v2 4/4] target/arm/cpu64: Validate sve vector lengths are supported |
Date: |
Tue, 24 Aug 2021 08:28:04 +0200 |
On Mon, Aug 23, 2021 at 11:04:49AM -0700, Richard Henderson wrote:
> On 8/23/21 9:06 AM, Andrew Jones wrote:
> > Future CPU types may specify which vector lengths are supported.
> > We can apply nearly the same logic to validate those lengths
> > as we do for KVM's supported vector lengths. We merge the code
> > where we can, but unfortunately can't completely merge it because
> > KVM requires all vector lengths, power-of-two or not, smaller than
> > the maximum enabled length to also be enabled. The architecture
> > only requires all the power-of-two lengths, though, so TCG will
> > only enforce that.
> >
> > Signed-off-by: Andrew Jones <drjones@redhat.com>
> > ---
> > target/arm/cpu64.c | 101 ++++++++++++++++++++-------------------------
> > 1 file changed, 45 insertions(+), 56 deletions(-)
>
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
> > + } else {
> > + if (kvm_enabled()) {
>
> Nit: better as
>
> } else if (...) {
>
> if I'm reading all of the diff context correctly.
>
Yeah, the diff is definitely not easy to read, or even the code
after its applied for that matter... We can't use 'else if' here
because the 'else { if' is part of a pattern like below
if (...) {
if (...) {
} else {
}
} else {
if (kvm_enabled()) {
} else {
}
}
Thanks,
drew