qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v3 08/15] target/riscv: Reassign instructions to the Zbb-exte


From: Richard Henderson
Subject: Re: [PATCH v3 08/15] target/riscv: Reassign instructions to the Zbb-extension
Date: Mon, 23 Aug 2021 10:20:56 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0

On 8/23/21 9:40 AM, Philipp Tomsich wrote:
This reassigns the instructions that are part of Zbb into it, with the
notable exceptions of the instructions (rev8, zext.w and orc.b) that
changed due to gorci, grevi and pack not being part of Zb[abcs].

Signed-off-by: Philipp Tomsich<philipp.tomsich@vrull.eu>
---

Changes in v3:
- The changes to the Zbb instructions (i.e. use the REQUIRE_ZBB macro)
   are now in a separate commit.

  target/riscv/insn32.decode              | 40 ++++++++++----------
  target/riscv/insn_trans/trans_rvb.c.inc | 50 ++++++++++++++-----------
  2 files changed, 49 insertions(+), 41 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]