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Re: [PATCH 0/9] hw/nvram: hw/arm: Introduce Xilinx eFUSE and BBRAM
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From: |
Edgar E. Iglesias |
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Subject: |
Re: [PATCH 0/9] hw/nvram: hw/arm: Introduce Xilinx eFUSE and BBRAM |
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Date: |
Thu, 19 Aug 2021 17:08:45 +0200 |
On Wed, Aug 18, 2021 at 09:02:59PM -0700, Tong Ho wrote:
> This series implements the Xilinx eFUSE and BBRAM devices for
> the Versal and ZynqMP product families.
>
> Furthermore, both new devices are connected to the xlnx-versal-virt
> board and the xlnx-zcu102 board.
Hi Tong,
A few general comments.
Patch #1 should probably be moved to be the last patch of the series.
I think we should remove the commands about register generation
"Partially generated by xregqemu.py". It may be confusing to others
since it's not a tool we run in the build process but rather a one
off extraction of reg definitions...
Thanks!
Edgar
- [PATCH 0/9] hw/nvram: hw/arm: Introduce Xilinx eFUSE and BBRAM, Tong Ho, 2021/08/19
- [PATCH 8/9] hw/arm: xlnx-zynqmp: Add Xilinx BBRAM device, Tong Ho, 2021/08/19
- [PATCH 9/9] hw/arm: xlnx-zynqmp: Add Xilinx eFUSE device, Tong Ho, 2021/08/19
- [PATCH 7/9] hw/arm: xlnx-versal: Add Xilinx eFUSE device, Tong Ho, 2021/08/19
- [PATCH 2/9] hw/nvram: Introduce Xilinx eFuse QOM, Tong Ho, 2021/08/19
- [PATCH 6/9] hw/arm: xlnx-versal: Add Xilinx BBRAM device, Tong Ho, 2021/08/19
- [PATCH 3/9] hw/nvram: Introduce Xilinx Versal eFuse device, Tong Ho, 2021/08/19
- [PATCH 4/9] hw/nvram: Introduce Xilinx ZynqMP eFuse device, Tong Ho, 2021/08/19
- [PATCH 5/9] hw/nvram: Introduce Xilinx battery-backed ram, Tong Ho, 2021/08/19
- [PATCH 1/9] docs/system/arm: xlnx-versal-virt: BBRAM and eFUSE Usage, Tong Ho, 2021/08/19
- Re: [PATCH 0/9] hw/nvram: hw/arm: Introduce Xilinx eFUSE and BBRAM,
Edgar E. Iglesias <=