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Re: [RFC PATCH 02/13] target/riscv: Support UXL32 for branch instruction


From: LIU Zhiwei
Subject: Re: [RFC PATCH 02/13] target/riscv: Support UXL32 for branch instructions
Date: Wed, 11 Aug 2021 22:57:34 +0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0


On 2021/8/10 上午3:34, Richard Henderson wrote:
On 8/8/21 3:45 PM, LIU Zhiwei wrote:

On 2021/8/6 上午3:06, Richard Henderson wrote:
On 8/4/21 4:53 PM, LIU Zhiwei wrote:
+static TCGv gpr_src_u(DisasContext *ctx, int reg_num)
+{
+    if (reg_num == 0) {
+        return ctx->zero;
+    }
+    if (ctx->uxl32) {
+        tcg_gen_ext32u_tl(cpu_gpr[reg_num], cpu_gpr[reg_num]);
+    }
+    return cpu_gpr[reg_num];
+}
+
+static TCGv gpr_src_s(DisasContext *ctx, int reg_num)
+{
+    if (reg_num == 0) {
+        return ctx->zero;
+    }
+    if (ctx->uxl32) {
+        tcg_gen_ext32s_tl(cpu_gpr[reg_num], cpu_gpr[reg_num]);
+    }
+    return cpu_gpr[reg_num];
+}

This is bad: you cannot modify the source registers like this.

In my opinion, when uxl32, the only meaningful part is the low 32 bits, and it doesn't matter to modify the high parts.

Then why does the architecture manual specify that when registers are modified the value written sign-extended?  This effect should be visible...

Hi Richard,

I  still don't know why the value written sign-extended.  If that's the the rule of final specification, I will try to obey it although our Linux will not depend on the high part.

Thanks,
Zhiwei



These incorrect modifications will be visible to the kernel on transition back to S-mode.

When transition back to S-mode, I think the kernel will save the U-mode registers to memory.

... here.  Once we're in S-mode, we have SXLEN, and if SXLEN > UXLEN, the high part of the register will be visible.  It really must be either (1) sign-extended because U-mode wrote to the register or (2) unmodified from the last time S-mode wrote to the register.


r~



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