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[PATCH 07/26] ppc/xive: Export PQ get/set routines
From: |
Cédric Le Goater |
Subject: |
[PATCH 07/26] ppc/xive: Export PQ get/set routines |
Date: |
Mon, 9 Aug 2021 15:45:28 +0200 |
These will be shared with the XIVE2 router.
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/ppc/xive.h | 4 ++++
hw/intc/spapr_xive_kvm.c | 8 ++++----
hw/intc/xive.c | 6 +++---
3 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index 445eccfe6b73..7e25c25bfda2 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -261,6 +261,10 @@ static inline hwaddr xive_source_esb_mgmt(XiveSource
*xsrc, int srcno)
#define XIVE_ESB_QUEUED (XIVE_ESB_VAL_P | XIVE_ESB_VAL_Q)
#define XIVE_ESB_OFF XIVE_ESB_VAL_Q
+bool xive_esb_trigger(uint8_t *pq);
+bool xive_esb_eoi(uint8_t *pq);
+uint8_t xive_esb_set(uint8_t *pq, uint8_t value);
+
/*
* "magic" Event State Buffer (ESB) MMIO offsets.
*
diff --git a/hw/intc/spapr_xive_kvm.c b/hw/intc/spapr_xive_kvm.c
index c00833116071..3e534b9685bf 100644
--- a/hw/intc/spapr_xive_kvm.c
+++ b/hw/intc/spapr_xive_kvm.c
@@ -297,7 +297,7 @@ static uint8_t xive_esb_read(XiveSource *xsrc, int srcno,
uint32_t offset)
return xive_esb_rw(xsrc, srcno, offset, 0, 0) & 0x3;
}
-static void xive_esb_trigger(XiveSource *xsrc, int srcno)
+static void kvmppc_xive_esb_trigger(XiveSource *xsrc, int srcno)
{
uint64_t *addr = xsrc->esb_mmap + xive_source_esb_page(xsrc, srcno);
@@ -322,7 +322,7 @@ uint64_t kvmppc_xive_esb_rw(XiveSource *xsrc, int srcno,
uint32_t offset,
offset == XIVE_ESB_LOAD_EOI) {
xive_esb_read(xsrc, srcno, XIVE_ESB_SET_PQ_00);
if (xsrc->status[srcno] & XIVE_STATUS_ASSERTED) {
- xive_esb_trigger(xsrc, srcno);
+ kvmppc_xive_esb_trigger(xsrc, srcno);
}
return 0;
} else {
@@ -366,7 +366,7 @@ void kvmppc_xive_source_set_irq(void *opaque, int srcno,
int val)
}
}
- xive_esb_trigger(xsrc, srcno);
+ kvmppc_xive_esb_trigger(xsrc, srcno);
}
/*
@@ -533,7 +533,7 @@ static void kvmppc_xive_change_state_handler(void *opaque,
bool running,
* generate a trigger.
*/
if (pq == XIVE_ESB_RESET && old_pq == XIVE_ESB_QUEUED) {
- xive_esb_trigger(xsrc, i);
+ kvmppc_xive_esb_trigger(xsrc, i);
}
}
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index eeb4e62ba954..5ec61ec14e68 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -816,7 +816,7 @@ void xive_tctx_destroy(XiveTCTX *tctx)
* XIVE ESB helpers
*/
-static uint8_t xive_esb_set(uint8_t *pq, uint8_t value)
+uint8_t xive_esb_set(uint8_t *pq, uint8_t value)
{
uint8_t old_pq = *pq & 0x3;
@@ -826,7 +826,7 @@ static uint8_t xive_esb_set(uint8_t *pq, uint8_t value)
return old_pq;
}
-static bool xive_esb_trigger(uint8_t *pq)
+bool xive_esb_trigger(uint8_t *pq)
{
uint8_t old_pq = *pq & 0x3;
@@ -846,7 +846,7 @@ static bool xive_esb_trigger(uint8_t *pq)
}
}
-static bool xive_esb_eoi(uint8_t *pq)
+bool xive_esb_eoi(uint8_t *pq)
{
uint8_t old_pq = *pq & 0x3;
--
2.31.1
- [PATCH 00/26] ppc/pnv: Extend the powernv10 machine, Cédric Le Goater, 2021/08/09
- [PATCH 04/26] ppc/pnv: Use a simple incrementing index for the chip-id, Cédric Le Goater, 2021/08/09
- [PATCH 01/26] ppc: Add a POWER10 DD2 CPU, Cédric Le Goater, 2021/08/09
- [PATCH 07/26] ppc/xive: Export PQ get/set routines,
Cédric Le Goater <=
- [PATCH 03/26] ppc/pnv: powerpc_excp: Do not discard HDECR exception when entering power-saving mode, Cédric Le Goater, 2021/08/09
- [PATCH 08/26] ppc/xive: Export xive_presenter_notify(), Cédric Le Goater, 2021/08/09
- [PATCH 02/26] ppc/pnv: Change the POWER10 machine to support DD2 only, Cédric Le Goater, 2021/08/09
- [PATCH 13/26] ppc/pnv: Add POWER10 quads, Cédric Le Goater, 2021/08/09
- [PATCH 05/26] ppc/pnv: Distribute RAM among the chips, Cédric Le Goater, 2021/08/09