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Re: [PATCH v2 06/55] target/microblaze: Do not set MO_ALIGN for user-onl
From: |
Edgar E. Iglesias |
Subject: |
Re: [PATCH v2 06/55] target/microblaze: Do not set MO_ALIGN for user-only |
Date: |
Wed, 4 Aug 2021 11:25:52 +0200 |
On Mon, Aug 02, 2021 at 06:13:54PM -1000, Richard Henderson wrote:
> The kernel will fix up unaligned accesses, so emulate that
> by allowing unaligned accesses to succeed.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
>
> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/microblaze/translate.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
> index a14ffed784..ef44bca2fd 100644
> --- a/target/microblaze/translate.c
> +++ b/target/microblaze/translate.c
> @@ -727,6 +727,7 @@ static TCGv compute_ldst_addr_ea(DisasContext *dc, int
> ra, int rb)
> }
> #endif
>
> +#ifndef CONFIG_USER_ONLY
> static void record_unaligned_ess(DisasContext *dc, int rd,
> MemOp size, bool store)
> {
> @@ -739,6 +740,7 @@ static void record_unaligned_ess(DisasContext *dc, int rd,
>
> tcg_set_insn_start_param(dc->insn_start, 1, iflags);
> }
> +#endif
>
> static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
> int mem_index, bool rev)
> @@ -760,12 +762,19 @@ static bool do_load(DisasContext *dc, int rd, TCGv
> addr, MemOp mop,
> }
> }
>
> + /*
> + * For system mode, enforce alignment if the cpu configuration
> + * requires it. For user-mode, the Linux kernel will have fixed up
> + * any unaligned access, so emulate that by *not* setting MO_ALIGN.
> + */
> +#ifndef CONFIG_USER_ONLY
> if (size > MO_8 &&
> (dc->tb_flags & MSR_EE) &&
> dc->cfg->unaligned_exceptions) {
> record_unaligned_ess(dc, rd, size, false);
> mop |= MO_ALIGN;
> }
> +#endif
>
> tcg_gen_qemu_ld_i32(reg_for_write(dc, rd), addr, mem_index, mop);
>
> @@ -906,12 +915,19 @@ static bool do_store(DisasContext *dc, int rd, TCGv
> addr, MemOp mop,
> }
> }
>
> + /*
> + * For system mode, enforce alignment if the cpu configuration
> + * requires it. For user-mode, the Linux kernel will have fixed up
> + * any unaligned access, so emulate that by *not* setting MO_ALIGN.
> + */
> +#ifndef CONFIG_USER_ONLY
> if (size > MO_8 &&
> (dc->tb_flags & MSR_EE) &&
> dc->cfg->unaligned_exceptions) {
> record_unaligned_ess(dc, rd, size, true);
> mop |= MO_ALIGN;
> }
> +#endif
>
> tcg_gen_qemu_st_i32(reg_for_read(dc, rd), addr, mem_index, mop);
>
> --
> 2.25.1
>
- Re: [PATCH v2 01/55] hw/core: Make do_unaligned_access noreturn, (continued)
- [PATCH v2 02/55] hw/core: Make do_unaligned_access available to user-only, Richard Henderson, 2021/08/03
- [PATCH v2 03/55] target/alpha: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/03
- [PATCH v2 04/55] target/arm: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/03
- [PATCH v2 05/55] target/hppa: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/03
- [PATCH v2 06/55] target/microblaze: Do not set MO_ALIGN for user-only, Richard Henderson, 2021/08/03
- Re: [PATCH v2 06/55] target/microblaze: Do not set MO_ALIGN for user-only,
Edgar E. Iglesias <=
- [PATCH v2 07/55] target/mips: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/03
- [PATCH v2 08/55] target/ppc: Move SPR_DSISR setting to powerpc_excp, Richard Henderson, 2021/08/03
- [PATCH v2 10/55] target/ppc: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/03
- [PATCH v2 11/55] target/riscv: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/03
- [PATCH v2 09/55] target/ppc: Set fault address in ppc_cpu_do_unaligned_access, Richard Henderson, 2021/08/03
- [PATCH v2 13/55] target/sh4: Set fault address in superh_cpu_do_unaligned_access, Richard Henderson, 2021/08/03
- [PATCH v2 14/55] target/sh4: Implement do_unaligned_access for user-only, Richard Henderson, 2021/08/03
- [PATCH v2 16/55] target/sparc: Split out build_sfsr, Richard Henderson, 2021/08/03