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[PATCH v2 40/55] target/arm: Use cpu_*_mmu instead of helper_*_mmu
From: |
Richard Henderson |
Subject: |
[PATCH v2 40/55] target/arm: Use cpu_*_mmu instead of helper_*_mmu |
Date: |
Mon, 2 Aug 2021 18:14:28 -1000 |
The helper_*_mmu functions were the only thing available
when this code was written. This could have been adjusted
when we added cpu_*_mmuidx_ra, but now we can most easily
use the newest set of interfaces.
Cc: qemu-arm@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper-a64.c | 52 +++++++----------------------------------
target/arm/m_helper.c | 6 ++---
2 files changed, 11 insertions(+), 47 deletions(-)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index f1a4089a4f..17c0ebebb2 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -512,37 +512,19 @@ uint64_t HELPER(paired_cmpxchg64_le)(CPUARMState *env,
uint64_t addr,
uintptr_t ra = GETPC();
uint64_t o0, o1;
bool success;
-
-#ifdef CONFIG_USER_ONLY
- /* ??? Enforce alignment. */
- uint64_t *haddr = g2h(env_cpu(env), addr);
-
- set_helper_retaddr(ra);
- o0 = ldq_le_p(haddr + 0);
- o1 = ldq_le_p(haddr + 1);
- oldv = int128_make128(o0, o1);
-
- success = int128_eq(oldv, cmpv);
- if (success) {
- stq_le_p(haddr + 0, int128_getlo(newv));
- stq_le_p(haddr + 1, int128_gethi(newv));
- }
- clear_helper_retaddr();
-#else
int mem_idx = cpu_mmu_index(env, false);
MemOpIdx oi0 = make_memop_idx(MO_LEQ | MO_ALIGN_16, mem_idx);
MemOpIdx oi1 = make_memop_idx(MO_LEQ, mem_idx);
- o0 = helper_le_ldq_mmu(env, addr + 0, oi0, ra);
- o1 = helper_le_ldq_mmu(env, addr + 8, oi1, ra);
+ o0 = cpu_ldq_le_mmu(env, addr + 0, oi0, ra);
+ o1 = cpu_ldq_le_mmu(env, addr + 8, oi1, ra);
oldv = int128_make128(o0, o1);
success = int128_eq(oldv, cmpv);
if (success) {
- helper_le_stq_mmu(env, addr + 0, int128_getlo(newv), oi1, ra);
- helper_le_stq_mmu(env, addr + 8, int128_gethi(newv), oi1, ra);
+ cpu_stq_le_mmu(env, addr + 0, int128_getlo(newv), oi1, ra);
+ cpu_stq_le_mmu(env, addr + 8, int128_gethi(newv), oi1, ra);
}
-#endif
return !success;
}
@@ -582,37 +564,19 @@ uint64_t HELPER(paired_cmpxchg64_be)(CPUARMState *env,
uint64_t addr,
uintptr_t ra = GETPC();
uint64_t o0, o1;
bool success;
-
-#ifdef CONFIG_USER_ONLY
- /* ??? Enforce alignment. */
- uint64_t *haddr = g2h(env_cpu(env), addr);
-
- set_helper_retaddr(ra);
- o1 = ldq_be_p(haddr + 0);
- o0 = ldq_be_p(haddr + 1);
- oldv = int128_make128(o0, o1);
-
- success = int128_eq(oldv, cmpv);
- if (success) {
- stq_be_p(haddr + 0, int128_gethi(newv));
- stq_be_p(haddr + 1, int128_getlo(newv));
- }
- clear_helper_retaddr();
-#else
int mem_idx = cpu_mmu_index(env, false);
MemOpIdx oi0 = make_memop_idx(MO_BEQ | MO_ALIGN_16, mem_idx);
MemOpIdx oi1 = make_memop_idx(MO_BEQ, mem_idx);
- o1 = helper_be_ldq_mmu(env, addr + 0, oi0, ra);
- o0 = helper_be_ldq_mmu(env, addr + 8, oi1, ra);
+ o1 = cpu_ldq_be_mmu(env, addr + 0, oi0, ra);
+ o0 = cpu_ldq_be_mmu(env, addr + 8, oi1, ra);
oldv = int128_make128(o0, o1);
success = int128_eq(oldv, cmpv);
if (success) {
- helper_be_stq_mmu(env, addr + 0, int128_gethi(newv), oi1, ra);
- helper_be_stq_mmu(env, addr + 8, int128_getlo(newv), oi1, ra);
+ cpu_stq_be_mmu(env, addr + 0, int128_gethi(newv), oi1, ra);
+ cpu_stq_be_mmu(env, addr + 8, int128_getlo(newv), oi1, ra);
}
-#endif
return !success;
}
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index efb522dc44..b6019595f5 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -1947,9 +1947,9 @@ static bool do_v7m_function_return(ARMCPU *cpu)
* do them as secure, so work out what MMU index that is.
*/
mmu_idx = arm_v7m_mmu_idx_for_secstate(env, true);
- oi = make_memop_idx(MO_LE, arm_to_core_mmu_idx(mmu_idx));
- newpc = helper_le_ldul_mmu(env, frameptr, oi, 0);
- newpsr = helper_le_ldul_mmu(env, frameptr + 4, oi, 0);
+ oi = make_memop_idx(MO_LEUL, arm_to_core_mmu_idx(mmu_idx));
+ newpc = cpu_ldl_le_mmu(env, frameptr, oi, 0);
+ newpsr = cpu_ldl_le_mmu(env, frameptr + 4, oi, 0);
/* Consistency checks on new IPSR */
newpsr_exc = newpsr & XPSR_EXCP;
--
2.25.1
- Re: [PATCH v2 30/55] target/i386: Use MO_128 for 16 byte atomics, (continued)
- [PATCH v2 33/55] target/hexagon: Implement cpu_mmu_index, Richard Henderson, 2021/08/03
- [PATCH v2 35/55] accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h, Richard Henderson, 2021/08/03
- [PATCH v2 37/55] target/mips: Use 8-byte memory ops for msa load/store, Richard Henderson, 2021/08/03
- [PATCH v2 38/55] target/s390x: Use cpu_*_mmu instead of helper_*_mmu, Richard Henderson, 2021/08/03
- [PATCH v2 32/55] target/s390x: Use MO_128 for 16 byte atomics, Richard Henderson, 2021/08/03
- [PATCH v2 36/55] target/mips: Use cpu_*_data_ra for msa load/store, Richard Henderson, 2021/08/03
- [PATCH v2 40/55] target/arm: Use cpu_*_mmu instead of helper_*_mmu,
Richard Henderson <=
- [PATCH v2 41/55] tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h, Richard Henderson, 2021/08/03
- [PATCH v2 42/55] tcg: Add helper_unaligned_mmu for user-only sigbus, Richard Henderson, 2021/08/03
- [PATCH v2 43/55] tcg/i386: Support raising sigbus for user-only, Richard Henderson, 2021/08/03
- [PATCH v2 44/55] tests/tcg/multiarch: Add sigbus.c, Richard Henderson, 2021/08/03
- [PATCH v2 46/55] linux-user: Disable more prctl subcodes, Richard Henderson, 2021/08/03
- [PATCH v2 47/55] hw/core/cpu: Re-sort the non-pointers to the end of CPUClass, Richard Henderson, 2021/08/03
- [PATCH v2 45/55] linux-user: Split out do_prctl and subroutines, Richard Henderson, 2021/08/03
- [PATCH v2 48/55] linux-user: Add code for PR_GET/SET_UNALIGN, Richard Henderson, 2021/08/03
- [PATCH v2 49/55] hw/core/cpu: Move cpu properties to cpu-sysemu.c, Richard Henderson, 2021/08/03
- [PATCH v2 50/55] hw/core/cpu: Add prctl-unalign-sigbus property for user-only, Richard Henderson, 2021/08/03