Re: QEMU on x64

[Alex Bennée]

Peter Maydell <peter.maydell@linaro.org> writes:

> On Fri, 30 Jul 2021 at 19:05, Christopher Caulfield
> <ctcaulfield@gmail.com> wrote:
>> This is Christopher from the debugging experiences team at Microsoft focused 
>> on kernel debugging. I am reaching out with a few questions about QEMU on 
>> x64.
>>
>> Is it possible for the QEMU-x86-64 GDB Server to send the full set
>> of x64 system registers (whether they are included in a separated
>> system xml file or as part of the core registers xml file)?
>
> Do you mean "is it possible for somebody to write code for
> QEMU to make it do that", or "does QEMU do it today if you pass
> it the right command line option" ? The answer to the former
> is "yes", to the latter "no". (If you want the debugger to
> be able to write to the system registers this might be a little
> trickier, mostly in terms of "auditing the code to make sure this
> can't confuse QEMU if you change some sysreg under its feet.".)
>
>> e.g. System registers missing from i386-64bit.xml file
>
>> DWORD64 IDTBase;
>> DWORD64 IDTLimit;
>> DWORD64 GDTBase;
>> DWORD64 GDTLimit;
>> DWORD SelLDT;
>> SEG64_DESC_INFO SegLDT;
>> DWORD SelTSS;
>> SEG64_DESC_INFO SegTSS;
>>
>> How can I access x64 MSR registers by using the QEMU-x86-64 GDB server?
>>
>> #define MSR_EFER 0xc0000080 // extended function enable register
>
> EFER is in the xml ("x64_efer") so should be already accessible.
> For anything else you're going to need to write some code to
> make it happen.
>
>>is there any plan to support reading/writing to MSRs via QEMU-x86-64
>GDB server?

Not at the moment but I am keen to see any eventual solution try to be
generic rather than hardwired for one architecture. The ARM code
currently builds custom XML from it's register descriptors to expose
it's MSR registers to the gdbstub. Ideally architecture front ends
should register their registers with a new subsystem which can then do
the glue between gdbstub as well as other systems that also care about
register values (logging, HMP, TCG plugins).

That said I'm not going to block any patches that just fix up the
current XML and target/i386/gdbstub code. I'm not familiar enough with
what the internal register representation state is for x86 w.r.t to TCG
and hypervisor based running modes.

> Not that I know of. We'd be happy to review patches if you want to
> write them.
>
> thanks
> -- PMM


-- 
Alex Bennée