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Re: [PATCH v2] hw/pcie-root-port: Fix hotplug for PCI devices requiring


From: Daniel P . Berrangé
Subject: Re: [PATCH v2] hw/pcie-root-port: Fix hotplug for PCI devices requiring IO
Date: Mon, 2 Aug 2021 10:05:08 +0100
User-agent: Mutt/2.0.7 (2021-05-04)

On Mon, Aug 02, 2021 at 12:00:57PM +0300, Marcel Apfelbaum wrote:
> Q35 has now ACPI hotplug enabled by default for PCI(e) devices.
> As opposed to native PCIe hotplug, guests like Fedora 34
> will not assign IO range to pcie-root-ports not supporting
> native hotplug, resulting into a regression.

Presumably this means this patch should have 'for 6.1' tagged
in subject, as we don't want 6.1 to regress ?

> 
> Reproduce by:
>     qemu-bin -M q35 -device pcie-root-port,id=p1 -monitor stdio
>     device_add e1000,bus=p1
> In the Guest OS the respective pcie-root-port will have the IO range
> disabled.
> 
> Fix it by setting the "reserve-io" hint capability of the
> pcie-root-ports so the firmware will allocate the IO range instead.
> 
> Acked-by: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
> ---
> v2:
>    - improve commit message (Igor)
> 
>  hw/pci-bridge/gen_pcie_root_port.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/hw/pci-bridge/gen_pcie_root_port.c 
> b/hw/pci-bridge/gen_pcie_root_port.c
> index ec9907917e..20099a8ae3 100644
> --- a/hw/pci-bridge/gen_pcie_root_port.c
> +++ b/hw/pci-bridge/gen_pcie_root_port.c
> @@ -28,6 +28,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(GenPCIERootPort, 
> GEN_PCIE_ROOT_PORT)
>          (GEN_PCIE_ROOT_PORT_AER_OFFSET + PCI_ERR_SIZEOF)
>  
>  #define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR       1
> +#define GEN_PCIE_ROOT_DEFAULT_IO_RANGE          4096
>  
>  struct GenPCIERootPort {
>      /*< private >*/
> @@ -75,6 +76,7 @@ static bool gen_rp_test_migrate_msix(void *opaque, int 
> version_id)
>  static void gen_rp_realize(DeviceState *dev, Error **errp)
>  {
>      PCIDevice *d = PCI_DEVICE(dev);
> +    PCIESlot *s = PCIE_SLOT(d);
>      GenPCIERootPort *grp = GEN_PCIE_ROOT_PORT(d);
>      PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(d);
>      Error *local_err = NULL;
> @@ -85,6 +87,9 @@ static void gen_rp_realize(DeviceState *dev, Error **errp)
>          return;
>      }
>  
> +    if (grp->res_reserve.io == -1 && s->hotplug && !s->native_hotplug) {
> +        grp->res_reserve.io = GEN_PCIE_ROOT_DEFAULT_IO_RANGE;
> +    }
>      int rc = pci_bridge_qemu_reserve_cap_init(d, 0,
>                                                grp->res_reserve, errp);
>  
> -- 
> 2.31.1
> 
> 

Regards,
Daniel
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